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author | Richard Henderson <rth@twiddle.net> | 2015-08-27 18:18:09 -0700 |
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committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:50 +1100 |
commit | dc03246cc377268db63abc8c5663ef571aec2eea (patch) | |
tree | 8e8ba297a6f05931a8bd835561b4f6ce05c9bb92 | |
parent | fec88f64bda27846add83e924c8f4def9d94e068 (diff) | |
download | qemu-dc03246cc377268db63abc8c5663ef571aec2eea.zip qemu-dc03246cc377268db63abc8c5663ef571aec2eea.tar.gz qemu-dc03246cc377268db63abc8c5663ef571aec2eea.tar.bz2 |
target-*: Drop cpu_gen_code define
This symbol no longer exists.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r-- | target-alpha/cpu.h | 1 | ||||
-rw-r--r-- | target-arm/cpu.h | 1 | ||||
-rw-r--r-- | target-cris/cpu.h | 1 | ||||
-rw-r--r-- | target-i386/cpu.h | 1 | ||||
-rw-r--r-- | target-lm32/cpu.h | 1 | ||||
-rw-r--r-- | target-m68k/cpu.h | 1 | ||||
-rw-r--r-- | target-microblaze/cpu.h | 1 | ||||
-rw-r--r-- | target-mips/cpu.h | 1 | ||||
-rw-r--r-- | target-moxie/cpu.h | 1 | ||||
-rw-r--r-- | target-openrisc/cpu.h | 1 | ||||
-rw-r--r-- | target-ppc/cpu.h | 1 | ||||
-rw-r--r-- | target-s390x/cpu.h | 1 | ||||
-rw-r--r-- | target-sh4/cpu.h | 1 | ||||
-rw-r--r-- | target-sparc/cpu.h | 1 | ||||
-rw-r--r-- | target-tilegx/cpu.h | 1 | ||||
-rw-r--r-- | target-xtensa/cpu.h | 1 |
16 files changed, 0 insertions, 16 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 097637e..bcd8076 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -287,7 +287,6 @@ struct CPUAlphaState { #define cpu_list alpha_cpu_list #define cpu_exec cpu_alpha_exec -#define cpu_gen_code cpu_alpha_gen_code #define cpu_signal_handler cpu_alpha_signal_handler #include "exec/cpu-all.h" diff --git a/target-arm/cpu.h b/target-arm/cpu.h index cebd463..493f9d0 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1601,7 +1601,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, #define cpu_init(cpu_model) CPU(cpu_arm_init(cpu_model)) #define cpu_exec cpu_arm_exec -#define cpu_gen_code cpu_arm_gen_code #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list diff --git a/target-cris/cpu.h b/target-cris/cpu.h index d47fad4..3220460 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -223,7 +223,6 @@ enum { #define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model)) #define cpu_exec cpu_cris_exec -#define cpu_gen_code cpu_cris_gen_code #define cpu_signal_handler cpu_cris_signal_handler /* MMU modes definitions */ diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 2b2a29d..54d9d50 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1189,7 +1189,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define cpu_init(cpu_model) CPU(cpu_x86_init(cpu_model)) #define cpu_exec cpu_x86_exec -#define cpu_gen_code cpu_x86_gen_code #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list #define cpudef_setup x86_cpudef_setup diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 3f874d5..2b7620c 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -219,7 +219,6 @@ bool lm32_cpu_do_semihosting(CPUState *cs); #define cpu_list lm32_cpu_list #define cpu_exec cpu_lm32_exec -#define cpu_gen_code cpu_lm32_gen_code #define cpu_signal_handler cpu_lm32_signal_handler int lm32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index d195706..224c169 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -213,7 +213,6 @@ void register_m68k_insns (CPUM68KState *env); #define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model)) #define cpu_exec cpu_m68k_exec -#define cpu_gen_code cpu_m68k_gen_code #define cpu_signal_handler cpu_m68k_signal_handler #define cpu_list m68k_cpu_list diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index b707c71..6b212ab 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -295,7 +295,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define cpu_init(cpu_model) CPU(cpu_mb_init(cpu_model)) #define cpu_exec cpu_mb_exec -#define cpu_gen_code cpu_mb_gen_code #define cpu_signal_handler cpu_mb_signal_handler /* MMU modes definitions */ diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 532b39e..f32a0fd 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -620,7 +620,6 @@ void mips_cpu_unassigned_access(CPUState *cpu, hwaddr addr, void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf); #define cpu_exec cpu_mips_exec -#define cpu_gen_code cpu_mips_gen_code #define cpu_signal_handler cpu_mips_signal_handler #define cpu_list mips_cpu_list diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h index 2bac15b..a612744 100644 --- a/target-moxie/cpu.h +++ b/target-moxie/cpu.h @@ -122,7 +122,6 @@ int cpu_moxie_signal_handler(int host_signum, void *pinfo, #define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model)) #define cpu_exec cpu_moxie_exec -#define cpu_gen_code cpu_moxie_gen_code #define cpu_signal_handler cpu_moxie_signal_handler static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch) diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 1ff1c9e..eb71607 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -360,7 +360,6 @@ int cpu_openrisc_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_list cpu_openrisc_list #define cpu_exec cpu_openrisc_exec -#define cpu_gen_code cpu_openrisc_gen_code #define cpu_signal_handler cpu_openrisc_signal_handler #ifndef CONFIG_USER_ONLY diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index c6dbb38..98ce5a7 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1241,7 +1241,6 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); #define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model)) #define cpu_exec cpu_ppc_exec -#define cpu_gen_code cpu_ppc_gen_code #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index b927c66..da0adf6 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -598,7 +598,6 @@ bool css_present(uint8_t cssid); #define cpu_init(model) CPU(cpu_s390x_init(model)) #define cpu_exec cpu_s390x_exec -#define cpu_gen_code cpu_s390x_gen_code #define cpu_signal_handler cpu_s390x_signal_handler void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 145e5df..5b022c5 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -226,7 +226,6 @@ void cpu_load_tlb(CPUSH4State * env); #define cpu_init(cpu_model) CPU(cpu_sh4_init(cpu_model)) #define cpu_exec cpu_sh4_exec -#define cpu_gen_code cpu_sh4_gen_code #define cpu_signal_handler cpu_sh4_signal_handler #define cpu_list sh4_cpu_list diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index c68e480..9fa770b 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -593,7 +593,6 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #endif #define cpu_exec cpu_sparc_exec -#define cpu_gen_code cpu_sparc_gen_code #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h index b9f5082..bcc1fdb 100644 --- a/target-tilegx/cpu.h +++ b/target-tilegx/cpu.h @@ -163,7 +163,6 @@ TileGXCPU *cpu_tilegx_init(const char *cpu_model); #define cpu_init(cpu_model) CPU(cpu_tilegx_init(cpu_model)) #define cpu_exec cpu_tilegx_exec -#define cpu_gen_code cpu_tilegx_gen_code #define cpu_signal_handler cpu_tilegx_signal_handler static inline void cpu_get_tb_cpu_state(CPUTLGState *env, target_ulong *pc, diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 148a0f8..006bcb7 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -382,7 +382,6 @@ typedef struct CPUXtensaState { #include "cpu-qom.h" #define cpu_exec cpu_xtensa_exec -#define cpu_gen_code cpu_xtensa_gen_code #define cpu_signal_handler cpu_xtensa_signal_handler #define cpu_list xtensa_cpu_list |