diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-02-15 10:00:53 +0000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-02-18 11:00:44 +1100 |
| commit | cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5 (patch) | |
| tree | 5955de3f783b5c11955b1add1708fcaf8afec604 | |
| parent | be13d3026abe5a0dcd12c9639658a87a3b417769 (diff) | |
| download | qemu-cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5.zip qemu-cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5.tar.gz qemu-cc2b90d7251c1aa4ace5a3058a7529c9887ab1e5.tar.bz2 | |
target/ppc: Add helper_mfvscr
This is required before changing the representation of the register.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20190215100058.20015-13-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target/ppc/arch_dump.c | 3 | ||||
| -rw-r--r-- | target/ppc/helper.h | 1 | ||||
| -rw-r--r-- | target/ppc/int_helper.c | 5 | ||||
| -rw-r--r-- | target/ppc/translate/vmx-impl.inc.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate_init.inc.c | 2 |
5 files changed, 10 insertions, 3 deletions
diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c index 3a00606..9ab04b2 100644 --- a/target/ppc/arch_dump.c +++ b/target/ppc/arch_dump.c @@ -17,6 +17,7 @@ #include "elf.h" #include "sysemu/dump.h" #include "sysemu/kvm.h" +#include "exec/helper-proto.h" #ifdef TARGET_PPC64 #define ELFCLASS ELFCLASS64 @@ -175,7 +176,7 @@ static void ppc_write_elf_vmxregset(NoteFuncArg *arg, PowerPCCPU *cpu) vmxregset->avr[i].u64[1] = avr->u64[1]; } } - vmxregset->vscr.u32[3] = cpu_to_dump32(s, cpu->env.vscr); + vmxregset->vscr.u32[3] = cpu_to_dump32(s, helper_mfvscr(&cpu->env)); } static void ppc_write_elf_vsxregset(NoteFuncArg *arg, PowerPCCPU *cpu) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index b3ffe28..7dbb08b 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -295,6 +295,7 @@ DEF_HELPER_5(vmsumshm, void, env, avr, avr, avr, avr) DEF_HELPER_5(vmsumshs, void, env, avr, avr, avr, avr) DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr) DEF_HELPER_FLAGS_2(mtvscr, TCG_CALL_NO_RWG, void, env, i32) +DEF_HELPER_FLAGS_1(mfvscr, TCG_CALL_NO_RWG, i32, env) DEF_HELPER_3(lvebx, void, env, avr, tl) DEF_HELPER_3(lvehx, void, env, avr, tl) DEF_HELPER_3(lvewx, void, env, avr, tl) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index aa6ad2c..ec3ef9f 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -463,6 +463,11 @@ void helper_mtvscr(CPUPPCState *env, uint32_t vscr) set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status); } +uint32_t helper_mfvscr(CPUPPCState *env) +{ + return env->vscr; +} + void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i; diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx-impl.inc.c index 182d3fc..5e13edb 100644 --- a/target/ppc/translate/vmx-impl.inc.c +++ b/target/ppc/translate/vmx-impl.inc.c @@ -187,7 +187,7 @@ static void gen_mfvscr(DisasContext *ctx) tcg_gen_movi_i64(avr, 0); set_avr64(rD(ctx->opcode), avr, true); t = tcg_temp_new_i32(); - tcg_gen_ld_i32(t, cpu_env, offsetof(CPUPPCState, vscr)); + gen_helper_mfvscr(t, cpu_env); tcg_gen_extu_i32_i64(avr, t); set_avr64(rD(ctx->opcode), avr, false); tcg_temp_free_i32(t); diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index ee574b3..1657d88 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -9573,7 +9573,7 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) return 16; } if (n == 32) { - stl_p(mem_buf, env->vscr); + stl_p(mem_buf, helper_mfvscr(env)); ppc_maybe_bswap_register(env, mem_buf, 4); return 4; } |