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author | Richard Henderson <richard.henderson@linaro.org> | 2021-11-16 10:50:42 +0100 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-11-17 19:18:22 +1000 |
commit | c94c239496256f1f1cb589825d052c2f3e26ebf6 (patch) | |
tree | 74b27b822e26a5690a23659fbe1e93d5418bfcc7 | |
parent | edcc4e4090ac56ea0d85ec482dd77bd7cc009b70 (diff) | |
download | qemu-c94c239496256f1f1cb589825d052c2f3e26ebf6.zip qemu-c94c239496256f1f1cb589825d052c2f3e26ebf6.tar.gz qemu-c94c239496256f1f1cb589825d052c2f3e26ebf6.tar.bz2 |
meson.build: Merge riscv32 and riscv64 cpu family
In ba0e73336200, we merged riscv32 and riscv64 in configure.
However, meson does not treat them the same. We need to merge
them here as well.
Fixes: ba0e73336200
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211116095042.335224-1-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r-- | meson.build | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/meson.build b/meson.build index 36540e0..e2d38a4 100644 --- a/meson.build +++ b/meson.build @@ -59,6 +59,12 @@ supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'x86', 'x86_64', 'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64'] cpu = host_machine.cpu_family() + +# Unify riscv* to a single family. +if cpu in ['riscv32', 'riscv64'] + cpu = 'riscv' +endif + targetos = host_machine.system() if cpu in ['x86', 'x86_64'] |