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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-08-29 15:00:28 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-08-29 15:00:28 +0100 |
| commit | c379621451e64cad166a60f42e1d67f0438b8d1b (patch) | |
| tree | aad716545a6078a2f1dde1ce4529d7fdf223c5f5 | |
| parent | ed1f13d607e2c64c66bea49d6f4edaf278d3d246 (diff) | |
| download | qemu-c379621451e64cad166a60f42e1d67f0438b8d1b.zip qemu-c379621451e64cad166a60f42e1d67f0438b8d1b.tar.gz qemu-c379621451e64cad166a60f42e1d67f0438b8d1b.tar.bz2 | |
target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
We implement the crypto extensions but were incorrectly reporting
ID register values for the Cortex-A57 which did not advertise
crypto. Use the correct values as described in the TRM.
With this fix Linux correctly detects presence of the crypto
features and advertises them in /proc/cpuinfo.
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1408718660-7295-1-git-send-email-peter.maydell@linaro.org
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target-arm/cpu64.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 38d2b84..aa42803 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -123,9 +123,10 @@ static void aarch64_a57_initfn(Object *obj) cpu->id_isar2 = 0x21232042; cpu->id_isar3 = 0x01112131; cpu->id_isar4 = 0x00011142; + cpu->id_isar5 = 0x00011121; cpu->id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->id_aa64isar0 = 0x00010000; + cpu->id_aa64isar0 = 0x00011120; cpu->id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; cpu->clidr = 0x0a200023; |