diff options
| author | Ravi Bangoria <ravi.bangoria@linux.ibm.com> | 2021-04-12 17:14:32 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-05-04 11:41:25 +1000 |
| commit | a7913d5e3fb35572f9ff033e7c1c7f1af6f5f0f7 (patch) | |
| tree | 87110dc79da7c2db92720b86f62b24ef6fa6ed6f | |
| parent | 98a6a3658805213a259b98687a84d37db8f43b01 (diff) | |
| download | qemu-a7913d5e3fb35572f9ff033e7c1c7f1af6f5f0f7.zip qemu-a7913d5e3fb35572f9ff033e7c1c7f1af6f5f0f7.tar.gz qemu-a7913d5e3fb35572f9ff033e7c1c7f1af6f5f0f7.tar.bz2 | |
ppc: Rename current DAWR macros and variables
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210412114433.129702-3-ravi.bangoria@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | include/hw/ppc/spapr.h | 2 | ||||
| -rw-r--r-- | target/ppc/cpu.h | 4 | ||||
| -rw-r--r-- | target/ppc/translate_init.c.inc | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index d2b5a9b..49a79fb 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -363,7 +363,7 @@ struct SpaprMachineState { /* Values for 2nd argument to H_SET_MODE */ #define H_SET_MODE_RESOURCE_SET_CIABR 1 -#define H_SET_MODE_RESOURCE_SET_DAWR 2 +#define H_SET_MODE_RESOURCE_SET_DAWR0 2 #define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE 3 #define H_SET_MODE_RESOURCE_LE 4 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 69fc9a2..8c18bb0 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1489,10 +1489,10 @@ typedef PowerPCCPU ArchCPU; #define SPR_MPC_BAR (0x09F) #define SPR_PSPB (0x09F) #define SPR_DPDES (0x0B0) -#define SPR_DAWR (0x0B4) +#define SPR_DAWR0 (0x0B4) #define SPR_RPR (0x0BA) #define SPR_CIABR (0x0BB) -#define SPR_DAWRX (0x0BC) +#define SPR_DAWRX0 (0x0BC) #define SPR_HFSCR (0x0BE) #define SPR_VRSAVE (0x100) #define SPR_USPRG0 (0x100) diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc index 0668648..58473c4 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -7748,12 +7748,12 @@ static void gen_spr_book3s_dbg(CPUPPCState *env) static void gen_spr_book3s_207_dbg(CPUPPCState *env) { - spr_register_kvm_hv(env, SPR_DAWR, "DAWR", + spr_register_kvm_hv(env, SPR_DAWR0, "DAWR0", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_DAWR, 0x00000000); - spr_register_kvm_hv(env, SPR_DAWRX, "DAWRX", + spr_register_kvm_hv(env, SPR_DAWRX0, "DAWRX0", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, |