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| author | Richard Henderson <rth@twiddle.net> | 2011-05-04 13:34:29 -0700 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-05-08 16:55:23 +0000 |
| commit | 403946c009cc7fd8a8aa719236801ed12121f8fd (patch) | |
| tree | cf91ca455b972faf91006d84b75864d4c88a022b | |
| parent | d1520316042de4f31e5c1464a992ffe57f1b6652 (diff) | |
| download | qemu-403946c009cc7fd8a8aa719236801ed12121f8fd.zip qemu-403946c009cc7fd8a8aa719236801ed12121f8fd.tar.gz qemu-403946c009cc7fd8a8aa719236801ed12121f8fd.tar.bz2 | |
target-arm: Privatize CPU_INTERRUPT_FIQ.
This interrupt name was only used by the ARM port.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | cpu-all.h | 1 | ||||
| -rw-r--r-- | poison.h | 1 | ||||
| -rw-r--r-- | target-arm/cpu.h | 4 |
3 files changed, 4 insertions, 2 deletions
@@ -828,7 +828,6 @@ extern CPUState *cpu_single_env; /* Temporary remapping from the generic names back to the previous cpu-specific names. These will be moved to target-foo/cpu.h next. */ -#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 #define CPU_INTERRUPT_SMI CPU_INTERRUPT_TGT_EXT_2 #define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_INT_0 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 @@ -39,7 +39,6 @@ #pragma GCC poison CPU_INTERRUPT_HARD #pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_FIQ #pragma GCC poison CPU_INTERRUPT_HALT #pragma GCC poison CPU_INTERRUPT_SMI #pragma GCC poison CPU_INTERRUPT_DEBUG diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d5af644..01f5b57 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -55,6 +55,10 @@ #define ARMV7M_EXCP_PENDSV 14 #define ARMV7M_EXCP_SYSTICK 15 +/* ARM-specific interrupt pending bits. */ +#define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 + + typedef void ARMWriteCPFunc(void *opaque, int cp_info, int srcreg, int operand, uint32_t value); typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info, |