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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-08 19:38:53 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-06-08 19:38:53 +0100 |
| commit | 3b318aaeef120a71544771cd84884ccad5fdff0a (patch) | |
| tree | 961ca2533d78d5d117a5f3d04867c5d132d0898b | |
| parent | 0c23d56fc149ada0823648481c09b5d2047570f4 (diff) | |
| download | qemu-3b318aaeef120a71544771cd84884ccad5fdff0a.zip qemu-3b318aaeef120a71544771cd84884ccad5fdff0a.tar.gz qemu-3b318aaeef120a71544771cd84884ccad5fdff0a.tar.bz2 | |
target/arm: Move regime_ttbr to ptw.c
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-25-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/helper.c | 16 | ||||
| -rw-r--r-- | target/arm/ptw.c | 16 | ||||
| -rw-r--r-- | target/arm/ptw.h | 1 |
3 files changed, 16 insertions, 17 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 8deb0fa..fdda87e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10475,22 +10475,6 @@ bool regime_translation_disabled(CPUARMState *env, ARMMMUIdx mmu_idx) return (regime_sctlr(env, mmu_idx) & SCTLR_M) == 0; } -/* Return the TTBR associated with this translation regime */ -uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn) -{ - if (mmu_idx == ARMMMUIdx_Stage2) { - return env->cp15.vttbr_el2; - } - if (mmu_idx == ARMMMUIdx_Stage2_S) { - return env->cp15.vsttbr_el2; - } - if (ttbrn == 0) { - return env->cp15.ttbr0_el[regime_el(env, mmu_idx)]; - } else { - return env->cp15.ttbr1_el[regime_el(env, mmu_idx)]; - } -} - /* Convert a possible stage1+2 MMU index into the appropriate * stage 1 MMU index */ diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8db4b5e..dc559e6 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -75,6 +75,22 @@ static bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx) } } +/* Return the TTBR associated with this translation regime */ +static uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn) +{ + if (mmu_idx == ARMMMUIdx_Stage2) { + return env->cp15.vttbr_el2; + } + if (mmu_idx == ARMMMUIdx_Stage2_S) { + return env->cp15.vsttbr_el2; + } + if (ttbrn == 0) { + return env->cp15.ttbr0_el[regime_el(env, mmu_idx)]; + } else { + return env->cp15.ttbr1_el[regime_el(env, mmu_idx)]; + } +} + static bool ptw_attrs_are_device(CPUARMState *env, ARMCacheAttrs cacheattrs) { /* diff --git a/target/arm/ptw.h b/target/arm/ptw.h index 3d3061a..ed152dd 100644 --- a/target/arm/ptw.h +++ b/target/arm/ptw.h @@ -12,7 +12,6 @@ #ifndef CONFIG_USER_ONLY bool regime_translation_disabled(CPUARMState *env, ARMMMUIdx mmu_idx); -uint64_t regime_ttbr(CPUARMState *env, ARMMMUIdx mmu_idx, int ttbrn); #endif /* !CONFIG_USER_ONLY */ #endif /* TARGET_ARM_PTW_H */ |