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| author | malc <av1474@comtv.ru> | 2011-08-22 14:39:00 +0400 |
|---|---|---|
| committer | malc <av1474@comtv.ru> | 2011-08-22 14:39:00 +0400 |
| commit | 350dba6ce65fbb81cff0603273289d50131a992b (patch) | |
| tree | 0409f72c7d745a3d17b10bb3610df28d4d5ed996 | |
| parent | 64ba39af27c0ddaa48fd5625f3109ae81e970e4e (diff) | |
| download | qemu-350dba6ce65fbb81cff0603273289d50131a992b.zip qemu-350dba6ce65fbb81cff0603273289d50131a992b.tar.gz qemu-350dba6ce65fbb81cff0603273289d50131a992b.tar.bz2 | |
tcg/ppc32: implement deposit_i32
Signed-off-by: malc <av1474@comtv.ru>
| -rw-r--r-- | tcg/ppc/tcg-target.c | 12 | ||||
| -rw-r--r-- | tcg/ppc/tcg-target.h | 2 |
2 files changed, 13 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 58c8621..4462647 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1790,6 +1790,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, } break; + case INDEX_op_deposit_i32: + tcg_out32 (s, RLWIMI + | RA (args[0]) + | RS (args[2]) + | SH (args[3]) + | MB (32 - args[3] - args[4]) + | ME (31 - args[3]) + ); + break; + default: tcg_dump_ops (s, stderr); tcg_abort (); @@ -1885,6 +1895,8 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_ext16s_i32, { "r", "r" } }, { INDEX_op_ext16u_i32, { "r", "r" } }, + { INDEX_op_deposit_i32, { "r", "0", "r" } }, + { -1 }, }; diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 8c35c4e..f9a88c4 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -92,7 +92,7 @@ enum { #define TCG_TARGET_HAS_eqv_i32 1 #define TCG_TARGET_HAS_nand_i32 1 #define TCG_TARGET_HAS_nor_i32 1 -#define TCG_TARGET_HAS_deposit_i32 0 +#define TCG_TARGET_HAS_deposit_i32 1 #define TCG_AREG0 TCG_REG_R27 |