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authorPeter Maydell <peter.maydell@linaro.org>2014-08-19 18:56:24 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-08-19 18:56:24 +0100
commit229a138d740142885dd4e7063e25147d7f71fdef (patch)
tree254b6c3f2fee791e05748211d20d39f7aae134a8
parent0e4a77370594c91dd126f9872893ed473374cc72 (diff)
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target-arm: Fix return address for A64 BRK instructions
When we take an exception resulting from a BRK instruction, the architecture requires that the "preferred return address" reported to the exception handler is the address of the BRK itself, not the following instruction (like undefined insns, and in contrast with SVC, HVC and SMC). Follow this, rather than incorrectly reporting the address of the following insn. (We do get this correct for the A32/T32 BKPT insns.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org
-rw-r--r--target-arm/translate-a64.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index f04ca49..2e21948 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1456,7 +1456,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
break;
}
/* BRK */
- gen_exception_insn(s, 0, EXCP_BKPT, syn_aa64_bkpt(imm16));
+ gen_exception_insn(s, 4, EXCP_BKPT, syn_aa64_bkpt(imm16));
break;
case 2:
if (op2_ll != 0) {