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authorRichard Henderson <richard.henderson@linaro.org>2019-10-01 10:16:02 -0700
committerDavid Hildenbrand <david@redhat.com>2019-10-09 12:49:01 +0200
commit1ab3302886b6b4278b439439ceacb46c4effbb5d (patch)
tree9d58be6eab19bc6bf0c9dc026eb4e018bbc5fc02
parent18ab936d0017a1a0bf041f4e4e277c83384684fe (diff)
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target/s390x: Handle tec in s390_cpu_tlb_fill
As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191001171614.8405-7-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
-rw-r--r--target/s390x/excp_helper.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index 552098b..ab2ed47 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
target_ulong vaddr, raddr;
- uint64_t asc;
+ uint64_t asc, tec;
int prot, fail, excp;
qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n",
@@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
"%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n",
__func__, (uint64_t)raddr, (uint64_t)ram_size);
excp = PGM_ADDRESSING;
+ tec = 0; /* unused */
fail = 1;
}
@@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
}
if (excp) {
+ if (excp != PGM_ADDRESSING) {
+ stq_phys(env_cpu(env)->as,
+ env->psa + offsetof(LowCore, trans_exc_code), tec);
+ }
trigger_pgm_exception(env, excp, ILEN_AUTO);
}
cpu_restore_state(cs, retaddr, true);