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authorPavel Dovgaluk <Pavel.Dovgaluk@ispras.ru>2013-04-15 10:59:15 +0400
committerAurelien Jarno <aurelien@aurel32.net>2013-04-20 21:27:52 +0200
commit089305ac0a273e64c9a5655d26da7fe19ecee66f (patch)
tree260518f1c25c7401cdb59c7a0e82d0fbdf8e43ad
parent21e5181f9552e3a876b488c77dc5cfeccff66414 (diff)
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i386 ROR r8/r16 instruction fix
Fixed EFLAGS corruption by ROR r8/r16 instruction located at the end of the TB. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--target-i386/translate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 233f24f..40f891d 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1775,6 +1775,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1, int is_right)
if (is_right) {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask - 1);
tcg_gen_shri_tl(cpu_cc_dst, cpu_T[0], mask);
+ tcg_gen_andi_tl(cpu_cc_dst, cpu_cc_dst, 1);
} else {
tcg_gen_shri_tl(cpu_cc_src2, cpu_T[0], mask);
tcg_gen_andi_tl(cpu_cc_dst, cpu_T[0], 1);