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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-03-02 23:42:56 +0100 |
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committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-01-13 09:32:32 +0100 |
commit | 37e506b69a6791bede30677f05081296f3b77f77 (patch) | |
tree | de58b757842eda91dc316bd38399de2e55c7ff3c /.mailmap | |
parent | 7c032bfbe838c24dcbdc8f9c452553b24f20daad (diff) | |
download | qemu-37e506b69a6791bede30677f05081296f3b77f77.zip qemu-37e506b69a6791bede30677f05081296f3b77f77.tar.gz qemu-37e506b69a6791bede30677f05081296f3b77f77.tar.bz2 |
hw/mips/gt64xxx_pci: Let the GT64120 manage the lower 512MiB hole
Per the comment in the Malta board, the [0x0000.0000-0x2000.0000]
range is decoded by the GT64120, so move the "empty_slot" there.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20221209151533.69516-3-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions