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| author | Peter Maydell <peter.maydell@linaro.org> | 2023-01-30 18:24:51 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-02-03 12:59:23 +0000 |
| commit | dc780233b60c0e4144e09b01f7060075a3c8ff49 (patch) | |
| tree | a8a048ac20728c7c624c0d77a70135de1e43d44a /.gitpublish | |
| parent | 917b1405c1d87c7710f502661f47508d131ea2ca (diff) | |
| download | qemu-dc780233b60c0e4144e09b01f7060075a3c8ff49.zip qemu-dc780233b60c0e4144e09b01f7060075a3c8ff49.tar.gz qemu-dc780233b60c0e4144e09b01f7060075a3c8ff49.tar.bz2 | |
target/arm: Mark up sysregs for HDFGRTR bits 12..63
Mark up the sysreg definitions for the registers trapped
by HDFGRTR/HDFGWTR bits 12..x.
Bits 12..22 and bit 58 are for PMU registers.
The remaining bits in HDFGRTR/HDFGWTR are for traps on
registers that are part of features we don't implement:
Bits 23..32 and 63 : FEAT_SPE
Bits 33..48 : FEAT_ETE
Bits 50..56 : FEAT_TRBE
Bits 59..61 : FEAT_BRBE
Bit 62 : FEAT_SPEv1p2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id: 20230130182459.3309057-16-peter.maydell@linaro.org
Message-id: 20230127175507.2895013-16-peter.maydell@linaro.org
Diffstat (limited to '.gitpublish')
0 files changed, 0 insertions, 0 deletions