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authorPeter Maydell <peter.maydell@linaro.org>2022-01-17 13:19:53 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-01-28 14:30:36 +0000
commit2c023d3675a3ffb54fc30504dcd715bc6f6e234f (patch)
treeb4a1dbfb1402260bd86e720cabc196fcb45c3440 /.gdbinit
parent08048cbd5e7dc0a0359ccb8c7968e4d011174801 (diff)
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target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp
The exception caused by an SVC instruction may be taken to AArch32 Hyp mode for two reasons: * HCR.TGE indicates that exceptions from EL0 should trap to EL2 * we were already in Hyp mode The entrypoint in the vector table to be used differs in these two cases: for an exception routed to Hyp mode from EL0, we enter at the common 0x14 "hyp trap" entrypoint. For SVC from Hyp mode to Hyp mode, we enter at the 0x08 (svc/hvc trap) entrypoint. In the v8A Arm ARM pseudocode this is done in AArch32.TakeSVCException. QEMU incorrectly routed both of these exceptions to the 0x14 entrypoint. Correct the entrypoint for SVC from Hyp to Hyp by making use of the existing logic which handles "normal entrypoint for Hyp-to-Hyp, otherwise 0x14" for traps like UNDEF and data/prefetch aborts (reproduced here since it's outside the visible context in the diff for this commit): if (arm_current_el(env) != 2 && addr < 0x14) { addr = 0x14; } Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220117131953.3936137-1-peter.maydell@linaro.org
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