From 63729473a588960ade22d42b94bcd1fa7fb11e71 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 9 Nov 2010 15:31:00 -0800 Subject: [opcodes, pk, sim, xcc] Tweaked FP encoding --- pk/fp.c | 42 ++++-------------- pk/pk.c | 1 - pk/riscv-opc.h | 136 ++++++++++++++++++--------------------------------------- 3 files changed, 52 insertions(+), 127 deletions(-) (limited to 'pk') diff --git a/pk/fp.c b/pk/fp.c index a034c5a..7e83967 100644 --- a/pk/fp.c +++ b/pk/fp.c @@ -54,7 +54,7 @@ int emulate_fp(trapframe_t* tf) uint64_t effective_address_store = XRS1 + bimm; softfloat_exceptionFlags = 0; - softfloat_roundingMode = (fp_state.fsr >> 5) & 3; + softfloat_roundingMode = (RM & 4) ? (RM & 3) : ((fp_state.fsr >> 5) & 3); #define IS_INSN(x) ((tf->insn & MASK_ ## x) == MATCH_ ## x) @@ -172,46 +172,22 @@ int emulate_fp(trapframe_t* tf) set_fp_reg(RRD, 0, f32_sqrt(frs1s)); else if(IS_INSN(SQRT_D)) set_fp_reg(RRD, 1, f64_sqrt(frs1d)); - else if(IS_INSN(CVT_W_S_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVT_W_S)) XRDR = f32_to_i32_r_minMag(frs1s,true); - } - else if(IS_INSN(CVT_W_D_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVT_W_D)) XRDR = f64_to_i32_r_minMag(frs1d,true); - } - else if(IS_INSN(CVT_L_S_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVT_L_S)) XRDR = f32_to_i64_r_minMag(frs1s,true); - } - else if(IS_INSN(CVT_L_D_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVT_L_D)) XRDR = f64_to_i64_r_minMag(frs1d,true); - } - else if(IS_INSN(CVTU_W_S_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVTU_W_S)) XRDR = f32_to_ui32_r_minMag(frs1s,true); - } - else if(IS_INSN(CVTU_W_D_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVTU_W_D)) XRDR = f64_to_ui32_r_minMag(frs1d,true); - } - else if(IS_INSN(CVTU_L_S_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVTU_L_S)) XRDR = f32_to_ui64_r_minMag(frs1s,true); - } - else if(IS_INSN(CVTU_L_D_RM)) - { - softfloat_roundingMode = RM; + else if(IS_INSN(CVTU_L_D)) XRDR = f64_to_ui64_r_minMag(frs1d,true); - } else return -1; diff --git a/pk/pk.c b/pk/pk.c index f4e0424..e9e3e71 100644 --- a/pk/pk.c +++ b/pk/pk.c @@ -145,7 +145,6 @@ static void mainvars_init() static void jump_usrstart() { - printk("strlen(\"\") = %d\n",strlen("")); trapframe_t tf; init_tf(&tf, USER_START, USER_MEM_SIZE-USER_MAINVARS_SIZE); pop_tf(&tf); diff --git a/pk/riscv-opc.h b/pk/riscv-opc.h index 6563a5d..948f9c3 100644 --- a/pk/riscv-opc.h +++ b/pk/riscv-opc.h @@ -1,16 +1,16 @@ /* Automatically generated by parse-opcodes */ +#define MATCH_CVT_W_D 0xd5850000 +#define MASK_CVT_W_D 0xff8ffc00 #define MATCH_MFF_D 0xd5ac0000 #define MASK_MFF_D 0xffff83e0 #define MATCH_SGNINJ_D 0xd5828000 #define MASK_SGNINJ_D 0xffff8000 #define MATCH_AMO_ADD 0xf4c00000 #define MASK_AMO_ADD 0xffff8000 -#define MATCH_CVT_D_L_RM 0xd5c60000 -#define MASK_CVT_D_L_RM 0xffcffc00 #define MATCH_REMUW 0xee438000 #define MASK_REMUW 0xffff8000 #define MATCH_NMADD_S 0xde000000 -#define MASK_NMADD_S 0xfff00000 +#define MASK_NMADD_S 0xff800000 #define MATCH_BLTU 0xc7800000 #define MASK_BLTU 0xffc00000 #define MATCH_C_EQ_S 0xd40a8000 @@ -18,33 +18,27 @@ #define MATCH_SGNINJ_S 0xd4028000 #define MASK_SGNINJ_S 0xffff8000 #define MATCH_DIV_D 0xd5818000 -#define MASK_DIV_D 0xffff8000 +#define MASK_DIV_D 0xff8f8000 +#define MATCH_CVT_W_S 0xd4050000 +#define MASK_CVT_W_S 0xff8ffc00 #define MATCH_CVT_S_W 0xd4070000 -#define MASK_CVT_S_W 0xfffffc00 -#define MATCH_CVTU_S_W_RM 0xd4478000 -#define MASK_CVTU_S_W_RM 0xffcffc00 +#define MASK_CVT_S_W 0xff8ffc00 #define MATCH_NMADD_D 0xdf800000 -#define MASK_NMADD_D 0xfff00000 +#define MASK_NMADD_D 0xff800000 #define MATCH_C_EQ_D 0xd58a8000 #define MASK_C_EQ_D 0xffff8000 #define MATCH_SLLIW 0xedc10000 #define MASK_SLLIW 0xffff8000 #define MATCH_AMOW_MAX 0xf4828000 #define MASK_AMOW_MAX 0xffff8000 -#define MATCH_CVT_L_S_RM 0xd4440000 -#define MASK_CVT_L_S_RM 0xffcffc00 #define MATCH_CVTU_D_L 0xd5868000 -#define MASK_CVTU_D_L 0xfffffc00 +#define MASK_CVTU_D_L 0xff8ffc00 #define MATCH_LH 0xf0400000 #define MASK_LH 0xffc00000 -#define MATCH_MSUB_S_RM 0xda400000 -#define MASK_MSUB_S_RM 0xffc00000 #define MATCH_LW 0xf0800000 #define MASK_LW 0xffc00000 #define MATCH_ADD 0xea000000 #define MASK_ADD 0xffff8000 -#define MATCH_CVT_W_D_RM 0xd5c50000 -#define MASK_CVT_W_D_RM 0xffcffc00 #define MATCH_AMOW_AND 0xf4810000 #define MASK_AMOW_AND 0xffff8000 #define MATCH_MFPCR 0xd6400000 @@ -56,21 +50,23 @@ #define MATCH_MTPCR 0xd6408000 #define MASK_MTPCR 0xffff801f #define MATCH_ADD_S 0xd4000000 -#define MASK_ADD_S 0xffff8000 +#define MASK_ADD_S 0xff8f8000 #define MATCH_BGEU 0xc7c00000 #define MASK_BGEU 0xffc00000 +#define MATCH_CVTU_L_D 0xd5848000 +#define MASK_CVTU_L_D 0xff8ffc00 #define MATCH_DI 0xd6008000 #define MASK_DI 0xffffffe0 #define MATCH_SLTIU 0xe8c00000 #define MASK_SLTIU 0xffc00000 #define MATCH_MFFL_D 0xd5ac8000 #define MASK_MFFL_D 0xffff83e0 -#define MATCH_MADD_S_RM 0xd8400000 -#define MASK_MADD_S_RM 0xffc00000 #define MATCH_SGNMUL_D 0xd5838000 #define MASK_SGNMUL_D 0xffff8000 +#define MATCH_CVTU_L_S 0xd4048000 +#define MASK_CVTU_L_S 0xff8ffc00 #define MATCH_ADD_D 0xd5800000 -#define MASK_ADD_D 0xffff8000 +#define MASK_ADD_D 0xff8f8000 #define MATCH_MUL 0xea400000 #define MASK_MUL 0xffff8000 #define MATCH_AMOW_MIN 0xf4820000 @@ -78,13 +74,9 @@ #define MATCH_NOR 0xea038000 #define MASK_NOR 0xffff8000 #define MATCH_NMSUB_D 0xdd800000 -#define MASK_NMSUB_D 0xfff00000 +#define MASK_NMSUB_D 0xff800000 #define MATCH_AMO_SWAP 0xf4c08000 #define MASK_AMO_SWAP 0xffff8000 -#define MATCH_CVTU_S_L_RM 0xd4468000 -#define MASK_CVTU_S_L_RM 0xffcffc00 -#define MATCH_MADD_D_RM 0xd9c00000 -#define MASK_MADD_D_RM 0xffc00000 #define MATCH_SRLI 0xe9c20000 #define MASK_SRLI 0xffff0000 #define MATCH_DIVUW 0xee428000 @@ -94,7 +86,7 @@ #define MATCH_SRLW 0xefc20000 #define MASK_SRLW 0xffff8000 #define MATCH_NMSUB_S 0xdc000000 -#define MASK_NMSUB_S 0xfff00000 +#define MASK_NMSUB_S 0xff800000 #define MATCH_MFCR 0xf6400000 #define MASK_MFCR 0xffff83e0 #define MATCH_C_LE_D 0xd58b8000 @@ -111,14 +103,12 @@ #define MASK_SYNC 0xffffffff #define MATCH_MTF_S 0xd42e0000 #define MASK_MTF_S 0xfffffc00 -#define MATCH_CVTU_W_D_RM 0xd5c58000 -#define MASK_CVTU_W_D_RM 0xffcffc00 #define MATCH_S_S 0xd2800000 #define MASK_S_S 0xffc00000 #define MATCH_MTCR 0xf6408000 #define MASK_MTCR 0xffff801f #define MATCH_MSUB_S 0xda000000 -#define MASK_MSUB_S 0xfff00000 +#define MASK_MSUB_S 0xff800000 #define MATCH_ADDW 0xee000000 #define MASK_ADDW 0xffff8000 #define MATCH_SLTU 0xea018000 @@ -129,8 +119,6 @@ #define MASK_SUB 0xffff8000 #define MATCH_ERET 0xd6800000 #define MASK_ERET 0xffffffff -#define MATCH_SQRT_D_RM 0xd5c20000 -#define MASK_SQRT_D_RM 0xffcffc00 #define MATCH_BLT 0xc7000000 #define MASK_BLT 0xffc00000 #define MATCH_SGNINJN_D 0xd5830000 @@ -141,12 +129,8 @@ #define MASK_SRLIW 0xffff8000 #define MATCH_LUI 0xe2000000 #define MASK_LUI 0xfe000000 -#define MATCH_CVTU_D_L_RM 0xd5c68000 -#define MASK_CVTU_D_L_RM 0xffcffc00 #define MATCH_ADDI 0xe8000000 #define MASK_ADDI 0xffc00000 -#define MATCH_ADD_D_RM 0xd5c00000 -#define MASK_ADD_D_RM 0xffcf8000 #define MATCH_MULH 0xea410000 #define MASK_MULH 0xffff8000 #define MATCH_MULHUW 0xee418000 @@ -161,8 +145,6 @@ #define MASK_LD 0xffc00000 #define MATCH_ORI 0xe9400000 #define MASK_ORI 0xffc00000 -#define MATCH_CVT_L_D_RM 0xd5c40000 -#define MASK_CVT_L_D_RM 0xffcffc00 #define MATCH_LB 0xf0000000 #define MASK_LB 0xffc00000 #define MATCH_ADDIW 0xec000000 @@ -171,32 +153,26 @@ #define MASK_MULW 0xffff8000 #define MATCH_MTFLH_D 0xd5be0000 #define MASK_MTFLH_D 0xffff8000 -#define MATCH_MUL_S_RM 0xd4410000 -#define MASK_MUL_S_RM 0xffcf8000 #define MATCH_SRA 0xebc30000 #define MASK_SRA 0xffff8000 #define MATCH_BGE 0xc7400000 #define MASK_BGE 0xffc00000 +#define MATCH_CVT_L_D 0xd5840000 +#define MASK_CVT_L_D 0xff8ffc00 #define MATCH_SRAIW 0xedc30000 #define MASK_SRAIW 0xffff8000 #define MATCH_SRL 0xebc20000 #define MASK_SRL 0xffff8000 -#define MATCH_CVTU_L_S_RM 0xd4448000 -#define MASK_CVTU_L_S_RM 0xffcffc00 -#define MATCH_NMSUB_D_RM 0xddc00000 -#define MASK_NMSUB_D_RM 0xffc00000 -#define MATCH_NMSUB_S_RM 0xdc400000 -#define MASK_NMSUB_S_RM 0xffc00000 +#define MATCH_CVT_L_S 0xd4040000 +#define MASK_CVT_L_S 0xff8ffc00 #define MATCH_OR 0xea028000 #define MASK_OR 0xffff8000 -#define MATCH_CVT_S_W_RM 0xd4470000 -#define MASK_CVT_S_W_RM 0xffcffc00 #define MATCH_SUBW 0xee008000 #define MASK_SUBW 0xffff8000 #define MATCH_JALR_C 0xc4000000 #define MASK_JALR_C 0xffc00000 #define MATCH_CVTU_S_W 0xd4078000 -#define MASK_CVTU_S_W 0xfffffc00 +#define MASK_CVTU_S_W 0xff8ffc00 #define MATCH_AMOW_MINU 0xf4830000 #define MASK_AMOW_MINU 0xffff8000 #define MATCH_JALR_J 0xc4800000 @@ -209,40 +185,24 @@ #define MASK_XORI 0xffc00000 #define MATCH_JALR_R 0xc4400000 #define MASK_JALR_R 0xffc00000 -#define MATCH_NMADD_S_RM 0xde400000 -#define MASK_NMADD_S_RM 0xffc00000 #define MATCH_CVTU_S_L 0xd4068000 -#define MASK_CVTU_S_L 0xfffffc00 +#define MASK_CVTU_S_L 0xff8ffc00 #define MATCH_AMO_MAX 0xf4c28000 #define MASK_AMO_MAX 0xffff8000 #define MATCH_AMO_MIN 0xf4c20000 #define MASK_AMO_MIN 0xffff8000 #define MATCH_ANDI 0xe9000000 #define MASK_ANDI 0xffc00000 -#define MATCH_SQRT_S_RM 0xd4420000 -#define MASK_SQRT_S_RM 0xffcffc00 -#define MATCH_CVTU_L_D_RM 0xd5c48000 -#define MASK_CVTU_L_D_RM 0xffcffc00 #define MATCH_JAL 0xc2000000 #define MASK_JAL 0xfe000000 #define MATCH_LWU 0xf1800000 #define MASK_LWU 0xffc00000 -#define MATCH_CVT_S_D_RM 0xd4498000 -#define MASK_CVT_S_D_RM 0xffcffc00 #define MATCH_AMO_MINU 0xf4c30000 #define MASK_AMO_MINU 0xffff8000 -#define MATCH_SUB_S_RM 0xd4408000 -#define MASK_SUB_S_RM 0xffcf8000 -#define MATCH_CVT_S_L 0xd4060000 -#define MASK_CVT_S_L 0xfffffc00 -#define MATCH_DIV_S_RM 0xd4418000 -#define MASK_DIV_S_RM 0xffcf8000 -#define MATCH_MUL_D_RM 0xd5c10000 -#define MASK_MUL_D_RM 0xffcf8000 +#define MATCH_MSUB_D 0xdb800000 +#define MASK_MSUB_D 0xff800000 #define MATCH_SUB_S 0xd4008000 -#define MASK_SUB_S 0xffff8000 -#define MATCH_NMADD_D_RM 0xdfc00000 -#define MASK_NMADD_D_RM 0xffc00000 +#define MASK_SUB_S 0xff8f8000 #define MATCH_SLT 0xea010000 #define MASK_SLT 0xffff8000 #define MATCH_SLLW 0xefc10000 @@ -260,9 +220,7 @@ #define MATCH_SLLI 0xe9c10000 #define MASK_SLLI 0xffff0000 #define MATCH_SUB_D 0xd5808000 -#define MASK_SUB_D 0xffff8000 -#define MATCH_CVT_S_L_RM 0xd4460000 -#define MASK_CVT_S_L_RM 0xffcffc00 +#define MASK_SUB_D 0xff8f8000 #define MATCH_BEQ 0xc6000000 #define MASK_BEQ 0xffc00000 #define MATCH_AND 0xea020000 @@ -270,7 +228,7 @@ #define MATCH_LBU 0xf1000000 #define MASK_LBU 0xffc00000 #define MATCH_SQRT_S 0xd4020000 -#define MASK_SQRT_S 0xfffffc00 +#define MASK_SQRT_S 0xff8ffc00 #define MATCH_SYSCALL 0xf6c00000 #define MASK_SYSCALL 0xffc003ff #define MATCH_C_LT_S 0xd40b0000 @@ -278,43 +236,37 @@ #define MATCH_MTF_D 0xd5ae0000 #define MASK_MTF_D 0xfffffc00 #define MATCH_SQRT_D 0xd5820000 -#define MASK_SQRT_D 0xfffffc00 -#define MATCH_ADD_S_RM 0xd4400000 -#define MASK_ADD_S_RM 0xffcf8000 +#define MASK_SQRT_D 0xff8ffc00 #define MATCH_AMOW_ADD 0xf4800000 #define MASK_AMOW_ADD 0xffff8000 #define MATCH_MULHW 0xee410000 #define MASK_MULHW 0xffff8000 #define MATCH_MADD_S 0xd8000000 -#define MASK_MADD_S 0xfff00000 +#define MASK_MADD_S 0xff800000 #define MATCH_MULHU 0xea418000 #define MASK_MULHU 0xffff8000 #define MATCH_AMO_AND 0xf4c10000 #define MASK_AMO_AND 0xffff8000 -#define MATCH_MSUB_D 0xdb800000 -#define MASK_MSUB_D 0xfff00000 #define MATCH_SGNMUL_S 0xd4038000 #define MASK_SGNMUL_S 0xffff8000 #define MATCH_RDNPC 0xf6000000 #define MASK_RDNPC 0xffffffe0 -#define MATCH_DIV_D_RM 0xd5c18000 -#define MASK_DIV_D_RM 0xffcf8000 +#define MATCH_CVT_S_L 0xd4060000 +#define MASK_CVT_S_L 0xff8ffc00 #define MATCH_MADD_D 0xd9800000 -#define MASK_MADD_D 0xfff00000 +#define MASK_MADD_D 0xff800000 #define MATCH_SYNCI 0xf1c00000 #define MASK_SYNCI 0xffc0001f #define MATCH_DIV_S 0xd4018000 -#define MASK_DIV_S 0xffff8000 +#define MASK_DIV_S 0xff8f8000 #define MATCH_UNIMP 0x0 #define MASK_UNIMP 0xffffffff #define MATCH_CVT_S_D 0xd4098000 -#define MASK_CVT_S_D 0xfffffc00 +#define MASK_CVT_S_D 0xff8ffc00 #define MATCH_C_LE_S 0xd40b8000 #define MASK_C_LE_S 0xffff8000 #define MATCH_MUL_S 0xd4010000 -#define MASK_MUL_S 0xffff8000 -#define MATCH_CVT_W_S_RM 0xd4450000 -#define MASK_CVT_W_S_RM 0xffcffc00 +#define MASK_MUL_S 0xff8f8000 #define MATCH_CVT_D_S 0xd5880000 #define MASK_CVT_D_S 0xfffffc00 #define MATCH_CVT_D_W 0xd5870000 @@ -322,7 +274,7 @@ #define MATCH_L_S 0xd0800000 #define MASK_L_S 0xffc00000 #define MATCH_CVT_D_L 0xd5860000 -#define MASK_CVT_D_L 0xfffffc00 +#define MASK_CVT_D_L 0xff8ffc00 #define MATCH_DIVW 0xee420000 #define MASK_DIVW 0xffff8000 #define MATCH_L_D 0xd0c00000 @@ -330,13 +282,15 @@ #define MATCH_DIVU 0xea428000 #define MASK_DIVU 0xffff8000 #define MATCH_MUL_D 0xd5810000 -#define MASK_MUL_D 0xffff8000 -#define MATCH_MSUB_D_RM 0xdbc00000 -#define MASK_MSUB_D_RM 0xffc00000 +#define MASK_MUL_D 0xff8f8000 +#define MATCH_CVTU_W_S 0xd4058000 +#define MASK_CVTU_W_S 0xff8ffc00 #define MATCH_SW 0xf2800000 #define MASK_SW 0xffc00000 #define MATCH_AMOW_SWAP 0xf4808000 #define MASK_AMOW_SWAP 0xffff8000 +#define MATCH_CVTU_W_D 0xd5858000 +#define MASK_CVTU_W_D 0xff8ffc00 #define MATCH_LHU 0xf1400000 #define MASK_LHU 0xffc00000 #define MATCH_SH 0xf2400000 @@ -349,9 +303,5 @@ #define MASK_SB 0xffc00000 #define MATCH_C_LT_D 0xd58b0000 #define MASK_C_LT_D 0xffff8000 -#define MATCH_CVTU_W_S_RM 0xd4458000 -#define MASK_CVTU_W_S_RM 0xffcffc00 -#define MATCH_SUB_D_RM 0xd5c08000 -#define MASK_SUB_D_RM 0xffcf8000 #define MATCH_SD 0xf2c00000 #define MASK_SD 0xffc00000 -- cgit v1.1