From 3aaacd44769a04e4aff3a3c788183e6a7fa75081 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU>
Date: Tue, 5 Oct 2010 15:08:18 -0700
Subject: [xcc,sim] eliminated vectored traps

now, the evec register holds the address that all traps vector to,
and the cause register is set with the trap number.
---
 pk/handlers.c | 44 ++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 42 insertions(+), 2 deletions(-)

(limited to 'pk/handlers.c')

diff --git a/pk/handlers.c b/pk/handlers.c
index 59338e5..38745bf 100644
--- a/pk/handlers.c
+++ b/pk/handlers.c
@@ -6,13 +6,11 @@ void handle_breakpoint(trapframe_t* tf)
   printk("Breakpoint\n");
   dump_tf(tf);
   tf->epc += 4;
-  pop_tf(tf);
 }
 
 void handle_fp_disabled(trapframe_t* tf)
 {
   tf->sr |= SR_EF;
-  pop_tf(tf);
 }
 
 void handle_badtrap(trapframe_t* tf)
@@ -62,3 +60,45 @@ void handle_fault_store(trapframe_t* tf)
   dump_tf(tf);
   panic("Faulting store!");
 }
+
+void handle_timer_interrupt(trapframe_t* tf)
+{
+  mtpcr(mfpcr(PCR_COMPARE)+TIMER_PERIOD,PCR_COMPARE);
+}
+
+void handle_trap(trapframe_t* tf)
+{
+  typedef void (*trap_handler)(trapframe_t*);
+  const static trap_handler trap_handlers[] = {
+    handle_misaligned_fetch,
+    handle_fault_fetch,
+    handle_illegal_instruction,
+    handle_privileged_instruction,
+    handle_fp_disabled,
+    handle_syscall,
+    handle_breakpoint,
+    handle_misaligned_ldst,
+    handle_fault_load,
+    handle_fault_store,
+    handle_badtrap,
+    handle_badtrap,
+    handle_badtrap,
+    handle_badtrap,
+    handle_badtrap,
+    handle_badtrap,
+    handle_badtrap, /* irq 0 */
+    handle_badtrap, /* irq 1 */
+    handle_badtrap, /* irq 2 */
+    handle_badtrap, /* irq 3 */
+    handle_badtrap, /* irq 4 */
+    handle_badtrap, /* irq 5 */
+    handle_badtrap, /* irq 6 */
+    handle_timer_interrupt, /* irq 7 */
+  };
+
+  kassert(tf->cause < sizeof(trap_handlers)/sizeof(trap_handlers[0]));
+
+  trap_handlers[tf->cause](tf);
+
+  pop_tf(tf);
+}
-- 
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