From 717702ceec053afd424a41ef6a4078d3cbd755b8 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 4 Aug 2021 16:06:11 -0700
Subject: Revert "Use a global 'tp' register."

This reverts commit 0d1fdc2e24b7b6247a55d24c13ae85dca7f45695.
---
 machine/fp_emulation.h | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/machine/fp_emulation.h b/machine/fp_emulation.h
index 98e261d..1352ca3 100644
--- a/machine/fp_emulation.h
+++ b/machine/fp_emulation.h
@@ -10,8 +10,6 @@
 #define PRECISION_S 0
 #define PRECISION_D 1
 
-register long tp asm("tp");
-
 #ifdef __riscv_flen
 # define GET_F32_REG(insn, pos, regs) ({ \
   register int32_t value asm("a0") = SHIFT_RIGHT(insn, (pos)-3) & 0xf8; \
@@ -43,20 +41,20 @@ register long tp asm("tp");
 # define SET_FFLAGS(value) write_csr(fflags, (value))
 
 # define SETUP_STATIC_ROUNDING(insn) ({ \
-  tp = read_csr(frm); \
+  register long tp asm("tp") = read_csr(frm); \
   if (likely(((insn) & MASK_FUNCT3) == MASK_FUNCT3)) ; \
   else if (GET_RM(insn) > 4) return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); \
   else tp = GET_RM(insn); \
   asm volatile ("":"+r"(tp)); })
 # define softfloat_raiseFlags(which) set_csr(fflags, which)
-# define softfloat_roundingMode ((int)tp)
+# define softfloat_roundingMode ({ register int tp asm("tp"); tp; })
 # define SET_FS_DIRTY() ((void) 0)
 #else
 # define GET_F64_REG(insn, pos, regs) (*(int64_t*)((void*)((regs) + 32) + (SHIFT_RIGHT(insn, (pos)-3) & 0xf8)))
 # define SET_F64_REG(insn, pos, regs, val) (GET_F64_REG(insn, pos, regs) = (val))
 # define GET_F32_REG(insn, pos, regs) (*(int32_t*)&GET_F64_REG(insn, pos, regs))
 # define SET_F32_REG(insn, pos, regs, val) (GET_F32_REG(insn, pos, regs) = (val))
-# define GET_FCSR() ({ (int)tp & 0xFF; })
+# define GET_FCSR() ({ register int tp asm("tp"); tp & 0xFF; })
 # define SET_FCSR(value) ({ asm volatile("add tp, x0, %0" :: "rI"((value) & 0xFF)); SET_FS_DIRTY(); })
 # define GET_FRM() (GET_FCSR() >> 5)
 # define SET_FRM(value) SET_FCSR(GET_FFLAGS() | ((value) << 5))
@@ -64,13 +62,13 @@ register long tp asm("tp");
 # define SET_FFLAGS(value) SET_FCSR((GET_FRM() << 5) | ((value) & 0x1F))
 
 # define SETUP_STATIC_ROUNDING(insn) ({ \
-  tp &= 0xFF; \
+  register int tp asm("tp"); tp &= 0xFF; \
   if (likely(((insn) & MASK_FUNCT3) == MASK_FUNCT3)) tp |= tp << 8; \
   else if (GET_RM(insn) > 4) return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); \
   else tp |= GET_RM(insn) << 13; \
   asm volatile ("":"+r"(tp)); })
 # define softfloat_raiseFlags(which) ({ asm volatile ("or tp, tp, %0" :: "rI"(which)); })
-# define softfloat_roundingMode ({ (int)tp >> 13; })
+# define softfloat_roundingMode ({ register int tp asm("tp"); tp >> 13; })
 # define SET_FS_DIRTY() set_csr(mstatus, MSTATUS_FS)
 #endif
 
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