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2019-08-26Merge commit '3d921d3c76db3af7b9ae0b5df0f0790f26222246' into rocc-enablerocc-enableColin Schmidt30-877/+1865
2017-12-12Bump encoding.hAndrew Waterman2-22/+25
2017-11-03Remove the platform interfacePalmer Dabbelt5-6/+58
We now automatically detect everything that the platform interface used to be used for, so it's now obsolete!
2017-11-02Check if we have extensions before using themPalmer Dabbelt1-5/+12
2017-11-02Initialize the UART firstPalmer Dabbelt1-3/+3
Without this I can't get printf to show me debug info during early boot.
2017-11-02Detect harts that can't boot Linux instead of hard-coding themPalmer Dabbelt6-10/+34
This checks to see if a hart can't boot Linux by looking for a compatible "mmu-type" field. If the hart can't boot Linux, then bbl masks it off.
2017-11-01Fix(?) fcvt.s.w emulation for rs1 = -2^31 (#66)Andrew Waterman1-1/+1
2017-10-23Make 4-byte aligned instruction-emulation loads atomicAndrew Waterman1-3/+12
Per the Unix-class platform spec
2017-08-14finisher: support terminating sifive devices simulation (#61)Wesley W. Terpstra6-4/+84
2017-08-03Add the '--enable-print-device-tree' argumentPalmer Dabbelt4-4/+142
I'm trying to debug some device tree problems while booting Linux and figured it would be really nice to have access to the device tree while trying to debug these problems. I think this might be useful for lots of people, so I went ahead and cleaned up the code enough that it should actaully work in most cases.
2017-08-02Move DISABLED_HART_MASK to the platformPalmer Dabbelt4-9/+10
Some platforms can't boot Linux on all the harts. This commit allows platforms to define the set of harts that should be prevented from booting past BBL. This is essentially just a new mechanism for defining the DISABLED_HART_MASK.
2017-08-02Allow the platform to disable HTIFPalmer Dabbelt1-3/+10
2017-08-02Add a platform interfacePalmer Dabbelt1-0/+1
SiFive's pk fork is the second one I've had to maintain, and it's a huge pain because people keep just leaving changes all over the tree. I want to introduce an interface that the platform-specific details can live behind so I don't have to keep doing these painful merges.
2017-07-17Fix emulation of misaligned RVC loads/storesAndrew Waterman1-2/+5
We were accidentally advancing the PC by 4, not 2.
2017-05-04FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.XAndrew Waterman2-11/+8
2017-04-18Use uint64_t, not uintptr_t, to represent FDT addresses/sizesAndrew Waterman3-21/+24
This fixes RV32 pk.
2017-04-18Fix RV32 compilation errorAndrew Waterman1-1/+2
2017-04-11Always write sbadaddr on trap redirectionAndrew Waterman3-6/+6
2017-04-11Load instructions as unsigned values, not signedAndrew Waterman1-4/+4
This matches the behavior of mbabaddr/mtval.
2017-04-06mtrap: allow override of DISABLED_HART_MASK from CFLAGSWesley W. Terpstra1-0/+2
2017-04-05Remove num_harts; use hart_mask exclusivelyAndrew Waterman4-6/+5
2017-04-05Rename HART_MASK to DISABLED_HART_MASK to clarify polarityAndrew Waterman4-5/+5
2017-04-05fdt: update the status length when masking cpusWesley W. Terpstra1-1/+4
2017-04-05bbl: prevent named cores from bootingWesley W. Terpstra4-2/+18
2017-04-05fdt: redact clint, plic, and debug hardwareWesley W. Terpstra2-2/+160
2017-04-05fdt: support redactionWesley W. Terpstra2-9/+13
2017-04-04Remove SBI console printm to speed up PK simulationAndrew Waterman1-1/+0
2017-03-31clint: move hart wakeup till after all FDT parsingWesley W. Terpstra3-6/+20
The clint was wiping out information discovered by the plic. Initialize hart stacks as they are discovered. Then fill in clint+plic info Then wake the harts.
2017-03-30New PMP encodingAndrew Waterman2-6/+7
2017-03-30fdt: look for the phandle of a cpu's nested interrupt controllerWesley W. Terpstra1-15/+34
2017-03-29Attempt to read instruction from mbadaddrAndrew Waterman1-5/+9
2017-03-28plic: discovered via fdtWesley W. Terpstra3-0/+103
2017-03-27uart: find it using fdtWesley W. Terpstra1-3/+41
2017-03-27fdt: rewrite parser using a single design patternWesley W. Terpstra2-105/+176
2017-03-27uart: add physical device driverWesley W. Terpstra5-2/+77
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman4-18/+34
2017-03-23fdt: add a size methodWesley W. Terpstra2-0/+11
2017-03-23Set up PMPs, permissively for nowAndrew Waterman1-0/+11
2017-03-22SBI: a0+a1 hold hartid+dtb pointer between boot loader stagesfdtWesley W. Terpstra3-24/+23
2017-03-22machine: add FDT parserWesley W. Terpstra4-7/+300
2017-03-21machine: remove configstringWesley W. Terpstra3-270/+0
2017-03-21Allow PK access to user memoryAndrew Waterman1-2/+13
2017-03-16Simplify interrupt-stack disciplineAndrew Waterman2-2/+45
https://github.com/riscv/riscv-isa-manual/commit/f2ed45b1791bb602657adc2ea9ab5fc409c62542
2017-03-08Don't rely on config string for basic functionalityAndrew Waterman1-1/+7
2017-02-27enable RoCC acceleratorHoward Mao2-0/+2
2017-02-25PPNs are 44 bits in RV64Andrew Waterman1-14/+7
2017-02-25New counter-enable schemeAndrew Waterman3-10/+12
https://github.com/riscv/riscv-isa-manual/issues/10
2017-02-22Fix PK bootAndrew Waterman3-19/+11
2017-02-20Don't block for acks on console writesAndrew Waterman4-36/+38
2017-02-20WIP on SBIAndrew Waterman4-61/+59