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2018-10-10Add "--with-max-memory-bytes", to limit the used memorymaxmemPalmer Dabbelt4-14/+40
I have no idea if this works, but it does at least compile. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2018-09-23Avoid writing reserved values to pmpaddr CSRAndrew Waterman1-1/+2
2018-09-17Fix git-submodule fatal error for berkeley-softfloat-3Michael Clark1-0/+0
A portend from git-submodule: $ git submodule update --init --recursive fatal: No url found for submodule path 'softfloat/berkeley-softfloat-3' in .gitmodules
2018-09-17Add softfloat/README.md detailing sourceMichael Clark1-0/+10
2018-08-15Fix printm on RV32 (#119)Andrew Waterman1-0/+16
Use a proxy syscall instead of a blocking character write. Resolves #84
2018-08-06Add some exception handling functions to s-mode to handle exception return ↵wxjstz1-0/+28
from m-mode. (#117)
2018-08-03Merge pull request #104 from heshamelmatary/disable_vmPalmer Dabbelt7-1/+57
bbl: boot payload in machine mode on --enable-boot-machine
2018-07-12minit: Move pmp setup code to a separate function to avoid duplicating codeHesham Almatary1-11/+7
Currently it's being used by both enter_supervisor_mode and enter_machine_mode
2018-07-12bbl: boot payload in machine mode when --enable-boot-machine is passedHesham Almatary4-0/+37
2018-07-12configure: Add --enable-boot-machine in BBLHesham Almatary3-0/+23
If --enable-boot-machine is passed, BBL disables VM and runs the payload in machine mode. This is useful for payloads (e.g. RTOSes or other OSes) that want to run only in machine mode while still relying on bbl/pk for system calls and emulation
2018-07-11Merge pull request #113 from riscv/licensePalmer Dabbelt394-5549/+33859
Upgrade SoftFloat
2018-07-11Merge pull request #91 from bukinr/masterPalmer Dabbelt1-1/+1
Include .bss section to the binary so dtb_output() gets full size of payload
2018-07-11Merge pull request #103 from zongbox/commentPalmer Dabbelt1-1/+1
Correct the comment of timer interrupt
2018-07-11Upgrade to SoftFloat 3eAndrew Waterman388-5544/+33807
2018-07-10Fix license on f32_classify and f64_classify (I wrote them)Andrew Waterman2-2/+2
2018-07-10Don't look for riscv_logo.txt if logo is not enabledAndrew Waterman3-3/+19
2018-07-10License my ASCII RISC-V logoAndrew Waterman1-0/+31
2018-07-09Properly license all nontrivial filesAndrew Waterman186-238/+955
2018-06-21Merge pull request #102 from zongbox/m32-v2Kito Cheng3-52/+39
Replace the --enable-32bit option by --with-arch
2018-06-21Replace the --enable-32bit option by --with-archZong Li3-52/+39
Get rid of the --enable-32bit option and switch to use --with-arch, which is more standard because it matches the GCC build. If --with-arch is not specified, it defaults to whatever the compiler's default is. The --with-abi is not necessary for this project. Unconditionally compile it with a no-float ABI.
2018-06-20Fix problem of casting u64 to void* on 32-bit environment (#111)Zong Li1-2/+2
Can't cast to pointer from 64 bit size integer directly on 32 bit environment.
2018-05-22Merge pull request #107 from michaeljclark/fdt-firmware-onlyPalmer Dabbelt9-11/+115
RISC-V: Support separate firmware and kernel payload
2018-05-22RISC-V: Support separate firmware and kernel payloadMichael Clark9-11/+115
Support for separate firmware and kernel payload is added by updating BBL to read optional preloaded kernel address attributes from device-tree using a similar mechanism to that used to pass init ramdisk addresses to linux kernel. chosen { riscv,kernel-start = <0x00000000 0x80200000>; riscv,kernel-end = <0x00000000 0x80590634>; }; These attributes are added by QEMU and read by BBL when combining -bios <firmware-image> and -kernel <kernel-image> options. e.g. $ qemu-system-riscv64 -machine virt -bios bbl -kernel vmlinux With this change, bbl can be compiled without --with-payload and the dummy payload alignment is altered to make the memory footprint of the firmware-only bbl smaller. The dummy payload message is updated to indicate the alternative load method. This load method could also be supported by a first stage boot loader that reads seperate firmware and kernel from SPI flash. The main advantage of this new mechanism is that it eases kernel development by avoiding the riscv-pk packaging step after kernel builds, makes building per repository artefacts for CI simpler, and mimics bootloaders on other platforms that can load a kernel image file directly. Ultimately BBL should use an SPI driver to load the kernel image however this mechanism supports use cases such such as QEMU's -bios, -kernel and -initrd options following examples from other platforms that pass kernel entry to firmware via device-tree. Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-05-21machine,minit: initialize emulated FCSR in enter_supervisor_mode() (#106)Zihao Yu1-0/+4
* If BBL emulates the FPU, the trap handler will load emulated FCSR from x0's save slot into tp. The emulated FCSR should be initialized, else the field of rounding mode will contain garbage codes. This will lead to raising SIGABRT for a user mode program which tries to print a floating point variable. In glibc, __printf_fp_l() (defined in riscv-glibc/stdio-common/printf_fp.c) will call round_away() (defined in riscv-glibc/include/rounding-mode.h). With a garbage rounding mode in emulated FCSR, round_away() may call abort().
2018-05-15Fix for missing supervisor mode when running on E51 (#96)Jim Straus1-3/+10
The E51 core on the U54-MC lacks supervisor mode, thus the plic_s_ie and plic_s_thresh are NULL when running on this core. This adds checks for this case.
2018-05-09Correct the comment of timer interruptZong Li1-1/+1
2018-04-27Fix typo of perf counter (#100)Zong Li1-2/+2
2018-04-24Enable FPU in PK, regardless of FPU presenceAndrew Waterman1-1/+1
Otherwise, the emulation code will refuse to emulate FP instructions.
2018-04-10SBI emulation of reads and writes to perf counters and config (#98)Alex Solomatnikov1-0/+58
2018-04-09Fix the wrong access of ipi pending address (#99)Zong Li1-2/+2
The MENTRY_IPI_PENDING_OFFSET offset is based on stack pointer
2018-03-23Include .bss section to the binary so dtb_output() gets full sizeRuslan Bukin1-1/+1
of payload, in result DTB will not overlap with bss and will not be zeroed by OS
2018-03-21Fix build with compilers defaulting to PIE (#90)aurel322-2/+2
Debian toolchain defaults to PIE, and I guess that will also be the case of most distributions. This cause bbl to be non-functional. This patch fixes that by adding -fno-PIE in the default CFLAGS.
2018-03-20minit: insert printm as work-around for a race conditionWesley W. Terpstra1-0/+1
Reboot does not work reliably without this.
2018-03-16Changed install_subdir to $host_alias with substituted 64->32 instead… (#89)Rishi Khan3-7/+9
* Changed install_subdir to $host_alias with substituted 64->32 instead of hardcoded riscv[32|64]-unknown-elf * Updated readme to reflect changes in install_subdir.
2018-03-15Update config.guess/config.subAndrew Waterman2-861/+950
Closes #87
2018-03-15Don't link build-id stringAndrew Waterman2-0/+4
Closes #88
2018-03-05mtrap: add a halt IPI used for poweroff (#86)Wesley W. Terpstra3-11/+18
Otherwise, linux complains the moment an interrupt arrives and wakes up one of the not-looping cores.
2018-02-01Bump the Linux version PK claims to supportAndrew Waterman1-1/+1
This makes it more compatible with recent glibc.
2018-01-22Merge pull request #77 from riscv/mtrap-fixPalmer Dabbelt1-1/+1
mtrap: loop forever, really
2018-01-22mtrap: loop forever, reallyWesley W. Terpstra1-1/+1
gcc sometimes takes liberties with optimizing away our important halt function!
2018-01-22Merge pull request #76 from riscv/racePalmer Dabbelt1-9/+2
Boot on the first hart
2018-01-22Boot on the first hartPalmer Dabbelt1-9/+2
This code is broken, and it's left over from before we could read the DTB to find harts to boot on.
2018-01-09Remove the repeating bitmask of medeleg register (#74)Zong Li1-1/+0
2017-12-16Merge pull request #73 from riscv/flush_icachePalmer Dabbelt2-0/+4
Add __riscv_flush_icache
2017-12-13Add __riscv_flush_icachePalmer Dabbelt2-0/+4
For BBL's purposes a local i-cache flush should be sufficient.
2017-12-13Merge pull request #72 from riscv/16550Palmer Dabbelt5-0/+95
Add a 16550 UART driver to back the SBI console
2017-12-12Add a 16550 UART driver to back the SBI consolePalmer Dabbelt5-0/+95
QEMU currently provides the console via HTIF and the SBI. That's a bit messy because BBL polls for serial input, which means that typing too quickly loses characters. While QEMU has a standard 16550 device model, there's no way to have two consoles share the console in QEMU (as they'd step all over each other) so that means we can't have both the HTIF console and the 16550 console. With this patch, QEMU can be changed to use a 16650 instead of the HTIF for serial output. Linux will use the SBI for early printk support (which is fine, polling for output is stable) and then swap over as soon as it detects the UART. When Linux swaps it prints out the whole history, but there's probably a way to get around that. There's a few lines that are output to both, but it appears the Linux driver is close enough to ours that nothing catastrophic happens -- there's not much to the device, so hopefully that pans out on real hardware too. Once Linux swaps over to natively using the driver we get reliable console input. If you don't have the in-kernel driver then Linux never swaps over and keeps using the SBI console just like before.
2017-12-12Bump encoding.hAndrew Waterman3-23/+26
2017-11-03Merge pull request #69 from riscv/endingsPalmer Dabbelt2-1/+6
Fix line endings in the logo
2017-11-03Fix line endings in the logoPalmer Dabbelt2-1/+6