Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2017-03-23 | pk: does not use dtb | Wesley W. Terpstra | 1 | -1/+1 | |
2017-03-23 | fdt: add a size method | Wesley W. Terpstra | 2 | -0/+11 | |
2017-03-23 | Set up PMPs, permissively for now | Andrew Waterman | 1 | -0/+11 | |
2017-03-22 | SBI: a0+a1 hold hartid+dtb pointer between boot loader stagesfdt | Wesley W. Terpstra | 5 | -31/+30 | |
2017-03-22 | machine: add FDT parser | Wesley W. Terpstra | 4 | -7/+300 | |
2017-03-21 | machine: remove configstring | Wesley W. Terpstra | 3 | -270/+0 | |
2017-03-21 | Allow PK access to user memory | Andrew Waterman | 2 | -2/+14 | |
2017-03-16 | Simplify interrupt-stack discipline | Andrew Waterman | 2 | -2/+45 | |
https://github.com/riscv/riscv-isa-manual/commit/f2ed45b1791bb602657adc2ea9ab5fc409c62542 | |||||
2017-03-08 | Don't rely on config string for basic functionality | Andrew Waterman | 1 | -1/+7 | |
2017-02-25 | PPNs are 44 bits in RV64 | Andrew Waterman | 1 | -14/+7 | |
2017-02-25 | New counter-enable scheme | Andrew Waterman | 3 | -10/+12 | |
https://github.com/riscv/riscv-isa-manual/issues/10 | |||||
2017-02-22 | Fix PK boot | Andrew Waterman | 4 | -22/+17 | |
2017-02-20 | Don't block for acks on console writes | Andrew Waterman | 17 | -118/+277 | |
2017-02-20 | WIP on SBI | Andrew Waterman | 5 | -63/+61 | |
2017-02-20 | minor HTIF cleanup + use WFI | Andrew Waterman | 2 | -7/+6 | |
2017-02-19 | Handle IPIs and timer interrupts more quickly | Andrew Waterman | 4 | -74/+71 | |
2017-02-17 | Clean up boot loader for physical address loading | Andrew Waterman | 3 | -20/+8 | |
2017-02-17 | WIP towards ECALL interface for SBI | Andrew Waterman | 17 | -289/+40 | |
2017-02-15 | Cleanly separate HTIF code; don't poll keyboard on timer interrupt | Andrew Waterman | 7 | -87/+92 | |
2017-02-15 | Emulate RVFC instructions | Andrew Waterman | 7 | -47/+190 | |
2017-02-15 | Incorporate sptbr/sfence.vma changes | Andrew Waterman | 5 | -20/+130 | |
2017-01-25 | Placate gcc7 about buffer sizesarchive-1.9.1 | Andrew Waterman | 1 | -2/+2 | |
2016-12-06 | avoid non-standard predefined macros | Andrew Waterman | 17 | -23/+23 | |
2016-11-13 | Add ability to hard-code an initial environment | Andrew Waterman | 1 | -2/+18 | |
2016-11-13 | For RV32, mmap offset is in 4 KiB increments | Andrew Waterman | 1 | -2/+6 | |
2016-11-13 | Cap pk memory size to 2 GiB for RV32 | Andrew Waterman | 1 | -0/+5 | |
2016-11-13 | Fix ld.so load address at 4 KiB | Andrew Waterman | 1 | -6/+10 | |
2016-11-13 | Add syscall stubs to get through libpthread initializers | Andrew Waterman | 2 | -0/+4 | |
2016-11-04 | Acquire lock before attempting tohost/fromhost sequences | Andrew Waterman | 1 | -12/+23 | |
2016-11-04 | Add spinlock_trylock routine; use it to implement spinlock_lock | Andrew Waterman | 1 | -2/+8 | |
2016-11-02 | Acquire write permissions before zeroing page in ELF loader | Andrew Waterman | 2 | -2/+6 | |
f81b722bf004177eadaf6f1b4b9e699e20257521 is a regression. If a read-only segment does not begin on a page boundary, it would cause the ELF loader to blow up. | |||||
2016-10-25 | Use __riscv_flen macro to detect FP support | Andrew Waterman | 6 | -10/+14 | |
2016-09-21 | make sure pages for ELF sections have correct protection (#40) | Howard Mao | 2 | -2/+20 | |
2016-09-15 | machine, mentry.S: fix not receiving IPI for other harts (#38) | sashimi-yzh | 1 | -0/+4 | |
* Before waiting for IPI by executing wfi instruction, MSIE bit should be set in mie CSR for other harts, else they will get stuck at the wfi instruction. | |||||
2016-09-09 | Attempt to disable FPU if using no-FPU pk/bbl | Andrew Waterman | 1 | -2/+3 | |
2016-09-09 | Add -p flag to pk to disable demand paging | Andrew Waterman | 3 | -3/+7 | |
2016-09-09 | machine, emulation.c: fix the condition of rdtime emulation (#37) | sashimi-yzh | 1 | -2/+2 | |
The time counter is enabled with the bit field set in `counteren` CSR. | |||||
2016-08-26 | Update to new counter spec | Andrew Waterman | 3 | -104/+351 | |
2016-08-16 | add htif section in linker script, with ALIGNs to prevent MMIO and data from ↵ | Sagar Karandikar | 3 | -2/+22 | |
being placed on same page (#32) | |||||
2016-08-10 | when -s is passed, print time, instret, cycle, and CPI | Andrew Waterman | 3 | -6/+19 | |
2016-08-09 | Disallow execution of RVC binaries on non-RVC pk | Andrew Waterman | 2 | -0/+6 | |
2016-07-29 | Align pk trap_entry for RVC | Andrew Waterman | 1 | -0/+1 | |
2016-07-28 | Don't let other harts boot before HLS is initialized | Andrew Waterman | 3 | -8/+12 | |
Use IPIs to signal them. | |||||
2016-07-21 | Update the readme with 32-bit info. (#29) | Prashanth Mundkur | 1 | -1/+9 | |
2016-07-19 | Handle misaligned loads in ascending order of byte address | Andrew Waterman | 1 | -1/+1 | |
2016-07-16 | Support 32bit build (#27) | Prashanth Mundkur | 3 | -8/+73 | |
* Support configuration for a 32-bit build. * Regenerate configure. | |||||
2016-07-16 | Improve trap redirection code | Andrew Waterman | 1 | -7/+6 | |
2016-07-16 | Add FCLASS emulation | Andrew Waterman | 2 | -7/+21 | |
2016-07-12 | zero-extend RV32 physical addresses for HTIF | Andrew Waterman | 2 | -2/+2 | |
2016-07-12 | Remove uarch counters | Andrew Waterman | 4 | -51/+0 | |
We'll re-add support for the generic performance counter facility once it exists. |