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2017-03-23pk: does not use dtbWesley W. Terpstra1-1/+1
2017-03-23fdt: add a size methodWesley W. Terpstra2-0/+11
2017-03-23Set up PMPs, permissively for nowAndrew Waterman1-0/+11
2017-03-22SBI: a0+a1 hold hartid+dtb pointer between boot loader stagesfdtWesley W. Terpstra5-31/+30
2017-03-22machine: add FDT parserWesley W. Terpstra4-7/+300
2017-03-21machine: remove configstringWesley W. Terpstra3-270/+0
2017-03-21Allow PK access to user memoryAndrew Waterman2-2/+14
2017-03-16Simplify interrupt-stack disciplineAndrew Waterman2-2/+45
https://github.com/riscv/riscv-isa-manual/commit/f2ed45b1791bb602657adc2ea9ab5fc409c62542
2017-03-08Don't rely on config string for basic functionalityAndrew Waterman1-1/+7
2017-02-25PPNs are 44 bits in RV64Andrew Waterman1-14/+7
2017-02-25New counter-enable schemeAndrew Waterman3-10/+12
https://github.com/riscv/riscv-isa-manual/issues/10
2017-02-22Fix PK bootAndrew Waterman4-22/+17
2017-02-20Don't block for acks on console writesAndrew Waterman17-118/+277
2017-02-20WIP on SBIAndrew Waterman5-63/+61
2017-02-20minor HTIF cleanup + use WFIAndrew Waterman2-7/+6
2017-02-19Handle IPIs and timer interrupts more quicklyAndrew Waterman4-74/+71
2017-02-17Clean up boot loader for physical address loadingAndrew Waterman3-20/+8
2017-02-17WIP towards ECALL interface for SBIAndrew Waterman17-289/+40
2017-02-15Cleanly separate HTIF code; don't poll keyboard on timer interruptAndrew Waterman7-87/+92
2017-02-15Emulate RVFC instructionsAndrew Waterman7-47/+190
2017-02-15Incorporate sptbr/sfence.vma changesAndrew Waterman5-20/+130
2017-01-25Placate gcc7 about buffer sizesarchive-1.9.1Andrew Waterman1-2/+2
2016-12-06avoid non-standard predefined macrosAndrew Waterman17-23/+23
2016-11-13Add ability to hard-code an initial environmentAndrew Waterman1-2/+18
2016-11-13For RV32, mmap offset is in 4 KiB incrementsAndrew Waterman1-2/+6
2016-11-13Cap pk memory size to 2 GiB for RV32Andrew Waterman1-0/+5
2016-11-13Fix ld.so load address at 4 KiBAndrew Waterman1-6/+10
2016-11-13Add syscall stubs to get through libpthread initializersAndrew Waterman2-0/+4
2016-11-04Acquire lock before attempting tohost/fromhost sequencesAndrew Waterman1-12/+23
2016-11-04Add spinlock_trylock routine; use it to implement spinlock_lockAndrew Waterman1-2/+8
2016-11-02Acquire write permissions before zeroing page in ELF loaderAndrew Waterman2-2/+6
f81b722bf004177eadaf6f1b4b9e699e20257521 is a regression. If a read-only segment does not begin on a page boundary, it would cause the ELF loader to blow up.
2016-10-25Use __riscv_flen macro to detect FP supportAndrew Waterman6-10/+14
2016-09-21make sure pages for ELF sections have correct protection (#40)Howard Mao2-2/+20
2016-09-15machine, mentry.S: fix not receiving IPI for other harts (#38)sashimi-yzh1-0/+4
* Before waiting for IPI by executing wfi instruction, MSIE bit should be set in mie CSR for other harts, else they will get stuck at the wfi instruction.
2016-09-09Attempt to disable FPU if using no-FPU pk/bblAndrew Waterman1-2/+3
2016-09-09Add -p flag to pk to disable demand pagingAndrew Waterman3-3/+7
2016-09-09machine, emulation.c: fix the condition of rdtime emulation (#37)sashimi-yzh1-2/+2
The time counter is enabled with the bit field set in `counteren` CSR.
2016-08-26Update to new counter specAndrew Waterman3-104/+351
2016-08-16add htif section in linker script, with ALIGNs to prevent MMIO and data from ↵Sagar Karandikar3-2/+22
being placed on same page (#32)
2016-08-10when -s is passed, print time, instret, cycle, and CPIAndrew Waterman3-6/+19
2016-08-09Disallow execution of RVC binaries on non-RVC pkAndrew Waterman2-0/+6
2016-07-29Align pk trap_entry for RVCAndrew Waterman1-0/+1
2016-07-28Don't let other harts boot before HLS is initializedAndrew Waterman3-8/+12
Use IPIs to signal them.
2016-07-21Update the readme with 32-bit info. (#29)Prashanth Mundkur1-1/+9
2016-07-19Handle misaligned loads in ascending order of byte addressAndrew Waterman1-1/+1
2016-07-16Support 32bit build (#27)Prashanth Mundkur3-8/+73
* Support configuration for a 32-bit build. * Regenerate configure.
2016-07-16Improve trap redirection codeAndrew Waterman1-7/+6
2016-07-16Add FCLASS emulationAndrew Waterman2-7/+21
2016-07-12zero-extend RV32 physical addresses for HTIFAndrew Waterman2-2/+2
2016-07-12Remove uarch countersAndrew Waterman4-51/+0
We'll re-add support for the generic performance counter facility once it exists.