diff options
Diffstat (limited to 'softfloat')
-rwxr-xr-x | softfloat/f32_classify.c | 33 | ||||
-rwxr-xr-x | softfloat/f64_classify.c | 33 | ||||
-rwxr-xr-x | softfloat/softfloat.h | 2 | ||||
-rw-r--r-- | softfloat/softfloat.mk.in | 2 |
4 files changed, 70 insertions, 0 deletions
diff --git a/softfloat/f32_classify.c b/softfloat/f32_classify.c new file mode 100755 index 0000000..d16aa25 --- /dev/null +++ b/softfloat/f32_classify.c @@ -0,0 +1,33 @@ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast16_t f32_classify( float32_t a ) +{ + union ui32_f32 uA; + uint_fast32_t uiA; + + uA.f = a; + uiA = uA.ui; + + uint_fast16_t infOrNaN = expF32UI( uiA ) == 0xFF; + uint_fast16_t subnormalOrZero = expF32UI( uiA ) == 0; + bool sign = signF32UI( uiA ); + + return + ( sign && infOrNaN && fracF32UI( uiA ) == 0 ) << 0 | + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | + ( sign && subnormalOrZero && fracF32UI( uiA ) ) << 2 | + ( sign && subnormalOrZero && fracF32UI( uiA ) == 0 ) << 3 | + ( !sign && infOrNaN && fracF32UI( uiA ) == 0 ) << 7 | + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | + ( !sign && subnormalOrZero && fracF32UI( uiA ) ) << 5 | + ( !sign && subnormalOrZero && fracF32UI( uiA ) == 0 ) << 4 | + ( isNaNF32UI( uiA ) && softfloat_isSigNaNF32UI( uiA )) << 8 | + ( isNaNF32UI( uiA ) && !softfloat_isSigNaNF32UI( uiA )) << 9; +} + diff --git a/softfloat/f64_classify.c b/softfloat/f64_classify.c new file mode 100755 index 0000000..2ec124b --- /dev/null +++ b/softfloat/f64_classify.c @@ -0,0 +1,33 @@ + +#include <stdbool.h> +#include <stdint.h> +#include "platform.h" +#include "internals.h" +#include "specialize.h" +#include "softfloat.h" + +uint_fast16_t f64_classify( float64_t a ) +{ + union ui64_f64 uA; + uint_fast64_t uiA; + + uA.f = a; + uiA = uA.ui; + + uint_fast16_t infOrNaN = expF64UI( uiA ) == 0x7FF; + uint_fast16_t subnormalOrZero = expF64UI( uiA ) == 0; + bool sign = signF64UI( uiA ); + + return + ( sign && infOrNaN && fracF64UI( uiA ) == 0 ) << 0 | + ( sign && !infOrNaN && !subnormalOrZero ) << 1 | + ( sign && subnormalOrZero && fracF64UI( uiA ) ) << 2 | + ( sign && subnormalOrZero && fracF64UI( uiA ) == 0 ) << 3 | + ( !sign && infOrNaN && fracF64UI( uiA ) == 0 ) << 7 | + ( !sign && !infOrNaN && !subnormalOrZero ) << 6 | + ( !sign && subnormalOrZero && fracF64UI( uiA ) ) << 5 | + ( !sign && subnormalOrZero && fracF64UI( uiA ) == 0 ) << 4 | + ( isNaNF64UI( uiA ) && softfloat_isSigNaNF64UI( uiA )) << 8 | + ( isNaNF64UI( uiA ) && !softfloat_isSigNaNF64UI( uiA )) << 9; +} + diff --git a/softfloat/softfloat.h b/softfloat/softfloat.h index 3eddeed..e989a55 100755 --- a/softfloat/softfloat.h +++ b/softfloat/softfloat.h @@ -128,6 +128,7 @@ bool f32_eq_signaling( float32_t, float32_t ); bool f32_le_quiet( float32_t, float32_t );
bool f32_lt_quiet( float32_t, float32_t );
bool f32_isSignalingNaN( float32_t );
+uint_fast16_t f32_classify( float32_t a );
/*----------------------------------------------------------------------------
| 64-bit (double-precision) floating-point operations.
@@ -158,6 +159,7 @@ bool f64_eq_signaling( float64_t, float64_t ); bool f64_le_quiet( float64_t, float64_t );
bool f64_lt_quiet( float64_t, float64_t );
bool f64_isSignalingNaN( float64_t );
+uint_fast16_t f64_classify( float64_t a );
/*----------------------------------------------------------------------------
| Extended double-precision rounding precision. Valid values are 32, 64, and
diff --git a/softfloat/softfloat.mk.in b/softfloat/softfloat.mk.in index 59993cb..0914b3b 100644 --- a/softfloat/softfloat.mk.in +++ b/softfloat/softfloat.mk.in @@ -31,6 +31,7 @@ softfloat_c_srcs = \ f32_to_ui32_r_minMag.c \ f32_to_ui64.c \ f32_to_ui64_r_minMag.c \ + f32_classify.c \ f64_add.c \ f64_div.c \ f64_eq.c \ @@ -55,6 +56,7 @@ softfloat_c_srcs = \ f64_to_ui32_r_minMag.c \ f64_to_ui64.c \ f64_to_ui64_r_minMag.c \ + f64_classify.c \ i32_to_f32.c \ i32_to_f64.c \ i64_to_f32.c \ |