diff options
Diffstat (limited to 'pk/pcr.h')
-rw-r--r-- | pk/pcr.h | 57 |
1 files changed, 37 insertions, 20 deletions
@@ -3,33 +3,37 @@ #ifndef _RISCV_PCR_H #define _RISCV_PCR_H -#define SR_ET 0x00000001 -#define SR_EF 0x00000002 -#define SR_EV 0x00000004 -#define SR_EC 0x00000008 -#define SR_PS 0x00000010 -#define SR_S 0x00000020 -#define SR_U64 0x00000040 -#define SR_S64 0x00000080 -#define SR_VM 0x00000100 +#define SR_S 0x00000001 +#define SR_PS 0x00000002 +#define SR_EI 0x00000004 +#define SR_PEI 0x00000008 +#define SR_EF 0x00000010 +#define SR_U64 0x00000020 +#define SR_S64 0x00000040 +#define SR_VM 0x00000080 +#define SR_EV 0x00000100 #define SR_IM 0x00FF0000 -#define SR_ZERO ~(SR_ET|SR_EF|SR_EV|SR_EC|SR_PS|SR_S|SR_U64|SR_S64|SR_VM|SR_IM) +#define SR_IP 0xFF000000 +#define SR_ZERO ~(SR_S|SR_PS|SR_EI|SR_PEI|SR_EF|SR_U64|SR_S64|SR_VM|SR_EV|SR_IM|SR_IP) #define SR_IM_SHIFT 16 +#define SR_IP_SHIFT 24 #define PCR_SR 0 #define PCR_EPC 1 #define PCR_BADVADDR 2 #define PCR_EVEC 3 -#define PCR_COUNT 4 -#define PCR_COMPARE 5 -#define PCR_CAUSE 6 -#define PCR_PTBR 7 -#define PCR_SEND_IPI 8 -#define PCR_CLR_IPI 9 -#define PCR_COREID 10 -#define PCR_IMPL 11 -#define PCR_K0 12 -#define PCR_K1 13 +#define PCR_CAUSE 4 +#define PCR_PTBR 5 +#define PCR_ASID 6 +#define PCR_FATC 7 +#define PCR_COUNT 8 +#define PCR_COMPARE 9 +#define PCR_SEND_IPI 10 +#define PCR_CLR_IPI 11 +#define PCR_HARTID 12 +#define PCR_IMPL 13 +#define PCR_K0 14 +#define PCR_K1 15 #define PCR_VECBANK 18 #define PCR_VECCFG 19 #define PCR_RESET 29 @@ -37,6 +41,7 @@ #define PCR_FROMHOST 31 #define IRQ_IPI 5 +#define IRQ_HOST 6 #define IRQ_TIMER 7 #define CAUSE_MISALIGNED_FETCH 0 @@ -62,6 +67,18 @@ #define CAUSE_VECTOR_FAULT_LOAD 30 #define CAUSE_VECTOR_FAULT_STORE 31 +// page table entry (PTE) fields +#define PTE_V 0x001 // Entry is a page Table descriptor +#define PTE_T 0x002 // Entry is a page Table, not a terminal node +#define PTE_G 0x004 // Global +#define PTE_UR 0x008 // User Write permission +#define PTE_UW 0x010 // User Read permission +#define PTE_UX 0x020 // User eXecute permission +#define PTE_SR 0x040 // Supervisor Read permission +#define PTE_SW 0x080 // Supervisor Write permission +#define PTE_SX 0x100 // Supervisor eXecute permission +#define PTE_PERM (PTE_SR | PTE_SW | PTE_SX | PTE_UR | PTE_UW | PTE_UX) + #ifdef __riscv #ifdef __riscv64 |