diff options
Diffstat (limited to 'pk/pcr.h')
-rw-r--r-- | pk/pcr.h | 19 |
1 files changed, 6 insertions, 13 deletions
@@ -11,10 +11,10 @@ #define SR_U64 0x00000020 #define SR_S64 0x00000040 #define SR_VM 0x00000080 -#define SR_EV 0x00000100 +#define SR_EA 0x00000100 #define SR_IM 0x00FF0000 #define SR_IP 0xFF000000 -#define SR_ZERO ~(SR_S|SR_PS|SR_EI|SR_PEI|SR_EF|SR_U64|SR_S64|SR_VM|SR_EV|SR_IM|SR_IP) +#define SR_ZERO ~(SR_S|SR_PS|SR_EI|SR_PEI|SR_EF|SR_U64|SR_S64|SR_VM|SR_EA|SR_IM|SR_IP) #define SR_IM_SHIFT 16 #define SR_IP_SHIFT 24 @@ -45,6 +45,9 @@ #define IRQ_HOST 6 #define IRQ_TIMER 7 +#define IMPL_SPIKE 1 +#define IMPL_ROCKET 2 + #define CAUSE_MISALIGNED_FETCH 0 #define CAUSE_FAULT_FETCH 1 #define CAUSE_ILLEGAL_INSTRUCTION 2 @@ -56,17 +59,7 @@ #define CAUSE_MISALIGNED_STORE 9 #define CAUSE_FAULT_LOAD 10 #define CAUSE_FAULT_STORE 11 -#define CAUSE_VECTOR_DISABLED 12 -#define CAUSE_VECTOR_BANK 13 - -#define CAUSE_VECTOR_MISALIGNED_FETCH 24 -#define CAUSE_VECTOR_FAULT_FETCH 25 -#define CAUSE_VECTOR_ILLEGAL_INSTRUCTION 26 -#define CAUSE_VECTOR_ILLEGAL_COMMAND 27 -#define CAUSE_VECTOR_MISALIGNED_LOAD 28 -#define CAUSE_VECTOR_MISALIGNED_STORE 29 -#define CAUSE_VECTOR_FAULT_LOAD 30 -#define CAUSE_VECTOR_FAULT_STORE 31 +#define CAUSE_ACCELERATOR_DISABLED 12 // page table entry (PTE) fields #define PTE_V 0x001 // Entry is a page Table descriptor |