Update to new privileged spec

33 files changed, 452 insertions, 81 deletions

diff --git a/softfloat/f32_roundToInt.c b/softfloat/f32_roundToInt.c
index f8f9114..9685cfe 100755
--- a/softfloat/f32_roundToInt.c
+++ b/softfloat/f32_roundToInt.c
@@ -28,7 +28,7 @@ float32_t f32_roundToInt( float32_t a, int_fast8_t roundingMode, bool exact )
     }
     if ( expA <= 0x7E ) {
         if ( ! (uint32_t) ( uiA<<1 ) ) return a;
-        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_raiseFlags( softfloat_flag_inexact );
         signA = signF32UI( uiA );
         switch ( roundingMode ) {
          case softfloat_round_nearest_even:
@@ -68,7 +68,7 @@ float32_t f32_roundToInt( float32_t a, int_fast8_t roundingMode, bool exact )
     }
     uiZ &= ~ roundBitsMask;
     if ( exact && ( uiZ != uiA ) ) {
-        softfloat_exceptionFlags |= softfloat_flag_inexact;
+        softfloat_raiseFlags( softfloat_flag_inexact );
     }
  uiZ:
     uZ.ui = uiZ;
diff --git a/softfloat/f32_to_i32_r_minMag.c b/softfloat/f32_to_i32_r_minMag.c
index 63ff1e2..d62677b 100755
--- a/softfloat/f32_to_i32_r_minMag.c
+++ b/softfloat/f32_to_i32_r_minMag.c
@@ -21,7 +21,7 @@ int_fast32_t f32_to_i32_r_minMag( float32_t a, bool exact )
     sig = fracF32UI( uiA );

     if ( exp < 0x7F ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -37,7 +37,7 @@ int_fast32_t f32_to_i32_r_minMag( float32_t a, bool exact )
     sig = ( sig | 0x00800000 )<<8;

     absZ = sig>>shiftCount;

     if ( exact && (uint32_t) ( sig<<( ( - shiftCount ) & 31 ) ) ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return sign ? - absZ : absZ;

 

diff --git a/softfloat/f32_to_i64_r_minMag.c b/softfloat/f32_to_i64_r_minMag.c
index 33bff93..7d852ae 100755
--- a/softfloat/f32_to_i64_r_minMag.c
+++ b/softfloat/f32_to_i64_r_minMag.c
@@ -22,7 +22,7 @@ int_fast64_t f32_to_i64_r_minMag( float32_t a, bool exact )
     sig = fracF32UI( uiA );

     if ( exp < 0x7F ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -44,7 +44,7 @@ int_fast64_t f32_to_i64_r_minMag( float32_t a, bool exact )
     if (

         exact && ( shiftCount < 0 ) && (uint32_t) ( sig<<( shiftCount & 31 ) )

     ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return sign ? - absZ : absZ;

 

diff --git a/softfloat/f32_to_ui32_r_minMag.c b/softfloat/f32_to_ui32_r_minMag.c
index edd858d..9380d27 100755
--- a/softfloat/f32_to_ui32_r_minMag.c
+++ b/softfloat/f32_to_ui32_r_minMag.c
@@ -20,7 +20,7 @@ uint_fast32_t f32_to_ui32_r_minMag( float32_t a, bool exact )
     sig = fracF32UI( uiA );

     if ( exp < 0x7F ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -30,7 +30,7 @@ uint_fast32_t f32_to_ui32_r_minMag( float32_t a, bool exact )
     sig = ( sig | 0x00800000 )<<8;

     z = sig>>shiftCount;

     if ( exact && ( sig & ( ( (uint_fast32_t) 1<<shiftCount ) - 1 ) ) ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return z;

  invalid:

diff --git a/softfloat/f32_to_ui64_r_minMag.c b/softfloat/f32_to_ui64_r_minMag.c
index 738d6b1..6e54594 100755
--- a/softfloat/f32_to_ui64_r_minMag.c
+++ b/softfloat/f32_to_ui64_r_minMag.c
@@ -20,7 +20,7 @@ uint_fast64_t f32_to_ui64_r_minMag( float32_t a, bool exact )
     sig = fracF32UI( uiA );

     if ( exp < 0x7F ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -34,7 +34,7 @@ uint_fast64_t f32_to_ui64_r_minMag( float32_t a, bool exact )
     if (

         exact && ( shiftCount < 0 ) && (uint32_t) ( sig<<( shiftCount & 31 ) )

     ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return z;

  invalid:

diff --git a/softfloat/f64_roundToInt.c b/softfloat/f64_roundToInt.c
index ef16dfa..d70e7e0 100755
--- a/softfloat/f64_roundToInt.c
+++ b/softfloat/f64_roundToInt.c
@@ -28,7 +28,7 @@ float64_t f64_roundToInt( float64_t a, int_fast8_t roundingMode, bool exact )
     }
     if ( expA <= 0x3FE ) {
         if ( ! ( uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) ) return a;
-        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+        if ( exact ) softfloat_raiseFlags( softfloat_flag_inexact );
         signA = signF64UI( uiA );
         switch ( roundingMode ) {
          case softfloat_round_nearest_even:
@@ -70,7 +70,7 @@ float64_t f64_roundToInt( float64_t a, int_fast8_t roundingMode, bool exact )
     }
     uiZ &= ~ roundBitsMask;
     if ( exact && ( uiZ != uiA ) ) {
-        softfloat_exceptionFlags |= softfloat_flag_inexact;
+        softfloat_raiseFlags( softfloat_flag_inexact );
     }
  uiZ:
     uZ.ui = uiZ;
diff --git a/softfloat/f64_to_i32_r_minMag.c b/softfloat/f64_to_i32_r_minMag.c
index 39246c2..176bda6 100755
--- a/softfloat/f64_to_i32_r_minMag.c
+++ b/softfloat/f64_to_i32_r_minMag.c
@@ -23,7 +23,7 @@ int_fast32_t f64_to_i32_r_minMag( float64_t a, bool exact )
     sig = fracF64UI( uiA );

     if ( exp < 0x3FF ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -39,7 +39,7 @@ int_fast32_t f64_to_i32_r_minMag( float64_t a, bool exact )
     z = uZ.i;

     if ( ( z < 0 ) != sign ) goto invalid;

     if ( exact && ( (uint_fast64_t) absZ<<shiftCount != sig ) ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return z;

  invalid:

diff --git a/softfloat/f64_to_i64_r_minMag.c b/softfloat/f64_to_i64_r_minMag.c
index 525705b..57bb4a9 100755
--- a/softfloat/f64_to_i64_r_minMag.c
+++ b/softfloat/f64_to_i64_r_minMag.c
@@ -36,14 +36,14 @@ int_fast64_t f64_to_i64_r_minMag( float64_t a, bool exact )
     } else {

         if ( exp < 0x3FF ) {

             if ( exact && ( exp | sig ) ) {

-                softfloat_exceptionFlags |= softfloat_flag_inexact;

+                softfloat_raiseFlags( softfloat_flag_inexact );

             }

             return 0;

         }

         sig |= UINT64_C( 0x0010000000000000 );

         absZ = sig>>( - shiftCount );

         if ( exact && (uint64_t) ( sig<<( shiftCount & 63 ) ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

     }

     return sign ? - absZ : absZ;

diff --git a/softfloat/f64_to_ui32_r_minMag.c b/softfloat/f64_to_ui32_r_minMag.c
index 9f1dd4d..c549f2d 100755
--- a/softfloat/f64_to_ui32_r_minMag.c
+++ b/softfloat/f64_to_ui32_r_minMag.c
@@ -20,7 +20,7 @@ uint_fast32_t f64_to_ui32_r_minMag( float64_t a, bool exact )
     sig = fracF64UI( uiA );

     if ( exp < 0x3FF ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -32,7 +32,7 @@ uint_fast32_t f64_to_ui32_r_minMag( float64_t a, bool exact )
     shiftCount = 0x433 - exp;

     z = sig>>shiftCount;

     if ( exact && ( (uint_fast64_t) z<<shiftCount != sig ) ) {

-        softfloat_exceptionFlags |= softfloat_flag_inexact;

+        softfloat_raiseFlags( softfloat_flag_inexact );

     }

     return z;

 

diff --git a/softfloat/f64_to_ui64_r_minMag.c b/softfloat/f64_to_ui64_r_minMag.c
index a66d3ff..8ef0924 100755
--- a/softfloat/f64_to_ui64_r_minMag.c
+++ b/softfloat/f64_to_ui64_r_minMag.c
@@ -20,7 +20,7 @@ uint_fast64_t f64_to_ui64_r_minMag( float64_t a, bool exact )
     sig = fracF64UI( uiA );

     if ( exp < 0x3FF ) {

         if ( exact && ( exp | sig ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

         return 0;

     }

@@ -33,7 +33,7 @@ uint_fast64_t f64_to_ui64_r_minMag( float64_t a, bool exact )
         sig |= UINT64_C( 0x0010000000000000 );

         z = sig>>( - shiftCount );

         if ( exact && (uint64_t) ( sig<<( shiftCount & 63 ) ) ) {

-            softfloat_exceptionFlags |= softfloat_flag_inexact;

+            softfloat_raiseFlags( softfloat_flag_inexact );

         }

     }

     return z;

diff --git a/softfloat/internals.h b/softfloat/internals.h
index 5e6fd76..ea18618 100755
--- a/softfloat/internals.h
+++ b/softfloat/internals.h
@@ -11,11 +11,6 @@ union ui128_f128 { uint64_t ui0, ui64; float128_t f; };
 union ui128_f128 { uint64_t ui64, ui0; float128_t f; };

 #endif

 

-enum {

-    softfloat_mulAdd_subC    = 1,

-    softfloat_mulAdd_subProd = 2

-};

-

 uint_fast32_t

  softfloat_roundPackToUI32( bool, uint_fast64_t, int_fast8_t, bool );

 uint_fast64_t

@@ -49,11 +44,6 @@ int_fast64_t
      bool, uint_fast64_t, uint_fast64_t, int_fast8_t, bool );

 

 /*----------------------------------------------------------------------------

-| Returns 1 if the single-precision floating-point value `a' is a NaN;

-| otherwise, returns 0.

-*----------------------------------------------------------------------------*/

-#define isNaNF32UI( ui ) (0xFF000000<(uint32_t)((uint_fast32_t)(ui)<<1))

-/*----------------------------------------------------------------------------

 | Returns the sign bit of the single-precision floating-point value `a'.

 *----------------------------------------------------------------------------*/

 #define signF32UI( a ) ((bool)((uint32_t)(a)>>31))

@@ -134,17 +124,8 @@ float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t, bool );
 | Standard for Binary Floating-Point Arithmetic.

 *----------------------------------------------------------------------------*/

 float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t, bool );

-/*----------------------------------------------------------------------------

-*----------------------------------------------------------------------------*/

-float32_t

- softfloat_mulAddF32( int, uint_fast32_t, uint_fast32_t, uint_fast32_t );

 

 /*----------------------------------------------------------------------------

-| Returns 1 if the double-precision floating-point value `a' is a NaN;

-| otherwise, returns 0.

-*----------------------------------------------------------------------------*/

-#define isNaNF64UI( ui ) (UINT64_C(0xFFE0000000000000)<(uint64_t)((uint_fast64_t)(ui)<<1))

-/*----------------------------------------------------------------------------

 | Returns the sign bit of the double-precision floating-point value `a'.

 *----------------------------------------------------------------------------*/

 #define signF64UI( a ) ((bool)((uint64_t)(a)>>63))

@@ -225,8 +206,4 @@ float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );
 | Standard for Binary Floating-Point Arithmetic.

 *----------------------------------------------------------------------------*/

 float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool );

-/*----------------------------------------------------------------------------

-*----------------------------------------------------------------------------*/

-float64_t

- softfloat_mulAddF64( int, uint_fast64_t, uint_fast64_t, uint_fast64_t );

 

diff --git a/softfloat/platform.h b/softfloat/platform.h
new file mode 100755
index 0000000..6c54313
--- /dev/null
+++ b/softfloat/platform.h
@@ -0,0 +1,42 @@
+
+/*============================================================================
+
+*** FIX.
+
+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2b.
+
+Written by John R. Hauser.  This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704.  Funding was partially provided by the
+National Science Foundation under grant MIP-9311980.  The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has
+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
+RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) the source code for the derivative work includes prominent notice that
+the work is derivative, and (2) the source code includes prominent notice with
+these four paragraphs for those parts of this code that are retained.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN
+
+#ifndef UINT64_C
+# define UINT64_C(x) (x ## ULL)
+# define INT64_C(x) (x ## LL)
+#endif
diff --git a/softfloat/s_commonNaNToF32UI.c b/softfloat/s_commonNaNToF32UI.c
new file mode 100755
index 0000000..61f2735
--- /dev/null
+++ b/softfloat/s_commonNaNToF32UI.c
@@ -0,0 +1,17 @@
+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Returns the result of converting the canonical NaN `a' to the single-

+| precision floating-point format.

+*----------------------------------------------------------------------------*/

+

+uint_fast32_t softfloat_commonNaNToF32UI( struct commonNaN a )

+{

+

+    return (uint_fast32_t) a.sign<<31 | 0x7FFFFFFF;

+

+}

+

diff --git a/softfloat/s_commonNaNToF64UI.c b/softfloat/s_commonNaNToF64UI.c
new file mode 100755
index 0000000..da36c04
--- /dev/null
+++ b/softfloat/s_commonNaNToF64UI.c
@@ -0,0 +1,18 @@
+
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+
+/*----------------------------------------------------------------------------
+| Returns the result of converting the canonical NaN `a' to the double-
+| precision floating-point format.
+*----------------------------------------------------------------------------*/
+
+uint_fast64_t softfloat_commonNaNToF64UI( struct commonNaN a )
+{
+
+    return
+        (uint_fast64_t) a.sign<<63 | UINT64_C( 0x7FFFFFFFFFFFFFFF );
+
+}
+
diff --git a/softfloat/s_f32UIToCommonNaN.c b/softfloat/s_f32UIToCommonNaN.c
new file mode 100755
index 0000000..9ee0db9
--- /dev/null
+++ b/softfloat/s_f32UIToCommonNaN.c
@@ -0,0 +1,25 @@
+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Returns the result of converting the single-precision floating-point NaN

+| `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct commonNaN softfloat_f32UIToCommonNaN( uint_fast32_t uiA )

+{

+    struct commonNaN z;

+

+    if ( softfloat_isSigNaNF32UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    z.sign = uiA>>31;

+    z.v64 = (uint_fast64_t) 0x7FFFF <<41;

+    z.v0 = 0;

+    return z;

+

+}

+

diff --git a/softfloat/s_f64UIToCommonNaN.c b/softfloat/s_f64UIToCommonNaN.c
new file mode 100755
index 0000000..84d8ca0
--- /dev/null
+++ b/softfloat/s_f64UIToCommonNaN.c
@@ -0,0 +1,25 @@
+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Returns the result of converting the double-precision floating-point NaN

+| `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct commonNaN softfloat_f64UIToCommonNaN( uint_fast64_t uiA )

+{

+    struct commonNaN z;

+

+    if ( softfloat_isSigNaNF64UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    z.sign = uiA>>63;

+    z.v64 = (uint_fast64_t) 0xFFFFFFFFFFFFF <<12;

+    z.v0 = 0;

+    return z;

+

+}

+

diff --git a/softfloat/s_isSigNaNF32UI.c b/softfloat/s_isSigNaNF32UI.c
new file mode 100755
index 0000000..0a9c33f
--- /dev/null
+++ b/softfloat/s_isSigNaNF32UI.c
@@ -0,0 +1,13 @@
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+
+bool softfloat_isSigNaNF32UI( uint_fast32_t ui )
+{
+
+    return ( ( ui>>22 & 0x1FF ) == 0x1FE ) && ( ui & 0x003FFFFF );
+
+}
+
diff --git a/softfloat/s_isSigNaNF64UI.c b/softfloat/s_isSigNaNF64UI.c
new file mode 100755
index 0000000..d255213
--- /dev/null
+++ b/softfloat/s_isSigNaNF64UI.c
@@ -0,0 +1,15 @@
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+
+bool softfloat_isSigNaNF64UI( uint_fast64_t ui )
+{
+
+    return
+        ( ( ui>>51 & 0xFFF ) == 0xFFE )
+            && ( ui & UINT64_C( 0x0007FFFFFFFFFFFF ) );
+
+}
+
diff --git a/softfloat/s_mulAddF64.c b/softfloat/s_mulAddF64.c
index 01ba3b4..70296bc 100755
--- a/softfloat/s_mulAddF64.c
+++ b/softfloat/s_mulAddF64.c
@@ -39,10 +39,10 @@ float64_t
     signB = signF64UI( uiB );

     expB = expF64UI( uiB );

     sigB = fracF64UI( uiB );

-    signC = signF64UI( uiC ) ^ ( op == softfloat_mulAdd_subC );

+    signC = signF64UI( uiC ) ^ (( op & softfloat_mulAdd_subC ) != 0);

     expC = expF64UI( uiC );

     sigC = fracF64UI( uiC );

-    signProd = signA ^ signB ^ ( op == softfloat_mulAdd_subProd );

+    signProd = signA ^ signB ^ ( ( op & softfloat_mulAdd_subProd ) != 0);

     if ( expA == 0x7FF ) {

         if ( sigA || ( ( expB == 0x7FF ) && sigB ) ) goto propagateNaN_ABC;

         magBits = expB | sigB;

diff --git a/softfloat/s_propagateNaNF32UI.c b/softfloat/s_propagateNaNF32UI.c
new file mode 100755
index 0000000..d8738d1
--- /dev/null
+++ b/softfloat/s_propagateNaNF32UI.c
@@ -0,0 +1,25 @@
+

+/*** UPDATE COMMENTS. ***/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Takes two single-precision floating-point values `a' and `b', one of which

+| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    if ( softfloat_isSigNaNF32UI( uiA ) | softfloat_isSigNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    return defaultNaNF32UI;

+}

+

diff --git a/softfloat/s_propagateNaNF64UI.c b/softfloat/s_propagateNaNF64UI.c
new file mode 100755
index 0000000..871989d
--- /dev/null
+++ b/softfloat/s_propagateNaNF64UI.c
@@ -0,0 +1,25 @@
+
+/*** UPDATE COMMENTS. ***/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Takes two double-precision floating-point values `a' and `b', one of which
+| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+    if ( softfloat_isSigNaNF64UI( uiA ) | softfloat_isSigNaNF64UI( uiB ) ) {
+        softfloat_raiseFlags( softfloat_flag_invalid );
+    }
+    return defaultNaNF64UI;
+}
+
diff --git a/softfloat/s_roundPackToF32.c b/softfloat/s_roundPackToF32.c
index 11764f1..578ae43 100755
--- a/softfloat/s_roundPackToF32.c
+++ b/softfloat/s_roundPackToF32.c
@@ -53,7 +53,7 @@ float32_t
             goto uiZ;
         }
     }
-    if ( roundBits ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+    if ( roundBits ) softfloat_raiseFlags( softfloat_flag_inexact );
     sig = ( sig + roundIncrement )>>7;
     sig &= ~ ( ! ( roundBits ^ 0x40 ) & roundNearestEven );
     uiZ = packToF32UI( sign, sig ? exp : 0, sig );
diff --git a/softfloat/s_roundPackToF64.c b/softfloat/s_roundPackToF64.c
index fb0ef1d..47d438d 100755
--- a/softfloat/s_roundPackToF64.c
+++ b/softfloat/s_roundPackToF64.c
@@ -54,7 +54,7 @@ float64_t
             goto uiZ;
         }
     }
-    if ( roundBits ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+    if ( roundBits ) softfloat_raiseFlags( softfloat_flag_inexact );
     sig = ( sig + roundIncrement )>>10;
     sig &= ~ ( ! ( roundBits ^ 0x200 ) & roundNearestEven );
     uiZ = packToF64UI( sign, sig ? exp : 0, sig );
diff --git a/softfloat/s_roundPackToI32.c b/softfloat/s_roundPackToI32.c
index 1c91497..6f63a3b 100755
--- a/softfloat/s_roundPackToI32.c
+++ b/softfloat/s_roundPackToI32.c
@@ -37,7 +37,7 @@ int_fast32_t
     z = uZ.i;
     if ( z && ( ( z < 0 ) ^ sign ) ) goto invalid;
     if ( exact && roundBits ) {
-        softfloat_exceptionFlags |= softfloat_flag_inexact;
+        softfloat_raiseFlags( softfloat_flag_inexact );
     }
     return z;
  invalid:
diff --git a/softfloat/s_roundPackToI64.c b/softfloat/s_roundPackToI64.c
index b2f5d63..c6085e5 100755
--- a/softfloat/s_roundPackToI64.c
+++ b/softfloat/s_roundPackToI64.c
@@ -40,7 +40,7 @@ int_fast64_t
     uZ.ui = sign ? - sig64 : sig64;
     z = uZ.i;
     if ( z && ( ( z < 0 ) ^ sign ) ) goto invalid;
-    if ( exact && sig0 ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+    if ( exact && sig0 ) softfloat_raiseFlags( softfloat_flag_inexact );
     return z;
  invalid:
     softfloat_raiseFlags( softfloat_flag_invalid );
diff --git a/softfloat/s_roundPackToUI32.c b/softfloat/s_roundPackToUI32.c
index ab44ec7..4465106 100755
--- a/softfloat/s_roundPackToUI32.c
+++ b/softfloat/s_roundPackToUI32.c
@@ -33,7 +33,7 @@ uint_fast32_t
     z &= ~ ( ! ( roundBits ^ 0x40 ) & roundNearestEven );
     if ( sign && z ) goto invalid;
     if ( exact && roundBits ) {
-        softfloat_exceptionFlags |= softfloat_flag_inexact;
+        softfloat_raiseFlags( softfloat_flag_inexact );
     }
     return z;
  invalid:
diff --git a/softfloat/s_roundPackToUI64.c b/softfloat/s_roundPackToUI64.c
index d42266f..dc9992b 100755
--- a/softfloat/s_roundPackToUI64.c
+++ b/softfloat/s_roundPackToUI64.c
@@ -36,7 +36,7 @@ uint_fast64_t
                     & roundNearestEven );
     }
     if ( sign && sig64 ) goto invalid;
-    if ( exact && sig0 ) softfloat_exceptionFlags |= softfloat_flag_inexact;
+    if ( exact && sig0 ) softfloat_raiseFlags( softfloat_flag_inexact );
     return sig64;
  invalid:
     softfloat_raiseFlags( softfloat_flag_invalid );
diff --git a/softfloat/softfloat.h b/softfloat/softfloat.h
index e989a55..5d812af 100755
--- a/softfloat/softfloat.h
+++ b/softfloat/softfloat.h
@@ -44,7 +44,6 @@ these four paragraphs for those parts of this code that are retained.
 /*----------------------------------------------------------------------------

 | Software floating-point underflow tininess-detection mode.

 *----------------------------------------------------------------------------*/

-extern int_fast8_t softfloat_detectTininess;

 enum {

     softfloat_tininess_beforeRounding = 0,

     softfloat_tininess_afterRounding  = 1

@@ -53,7 +52,6 @@ enum {
 /*----------------------------------------------------------------------------

 | Software floating-point rounding mode.

 *----------------------------------------------------------------------------*/

-extern int_fast8_t softfloat_roundingMode;

 enum {

     softfloat_round_nearest_even   = 0,

     softfloat_round_minMag         = 1,

@@ -75,11 +73,6 @@ enum {
 };

 

 /*----------------------------------------------------------------------------

-| Routine to raise any or all of the software floating-point exception flags.

-*----------------------------------------------------------------------------*/

-void softfloat_raiseFlags( int_fast8_t );

-

-/*----------------------------------------------------------------------------

 | Integer-to-floating-point conversion routines.

 *----------------------------------------------------------------------------*/

 float32_t ui32_to_f32( uint_fast32_t );

@@ -227,6 +220,30 @@ bool f128_le_quiet( float128_t, float128_t );
 bool f128_lt_quiet( float128_t, float128_t );

 bool f128_isSignalingNaN( float128_t );

 

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Returns 1 if the single-precision floating-point value `a' is a NaN;

+| otherwise, returns 0.

+*----------------------------------------------------------------------------*/

+#define isNaNF32UI( ui ) (0xFF000000<(uint32_t)((uint_fast32_t)(ui)<<1))

+/*----------------------------------------------------------------------------

+| Returns 1 if the double-precision floating-point value `a' is a NaN;

+| otherwise, returns 0.

+*----------------------------------------------------------------------------*/

+#define isNaNF64UI( ui ) (UINT64_C(0xFFE0000000000000)<(uint64_t)((uint_fast64_t)(ui)<<1))

+

+enum {

+    softfloat_mulAdd_subC    = 1,

+    softfloat_mulAdd_subProd = 2

+};

+

+float32_t

+ softfloat_mulAddF32( int, uint_fast32_t, uint_fast32_t, uint_fast32_t );

+

+float64_t

+ softfloat_mulAddF64( int, uint_fast64_t, uint_fast64_t, uint_fast64_t );

+

 #ifdef __cplusplus

 }

 #endif

diff --git a/softfloat/softfloat.mk.in b/softfloat/softfloat.mk.in
index 0914b3b..b9b4253 100644
--- a/softfloat/softfloat.mk.in
+++ b/softfloat/softfloat.mk.in
@@ -1,10 +1,10 @@
-softfloat_subproject_deps = \
-	sotfloat_riscv \
-
 softfloat_hdrs = \
 	internals.h \
 	primitives.h \
 	softfloat.h \
+	softfloat_types.h \
+	platform.h        \
+	specialize.h      \
 
 softfloat_c_srcs = \
 	f32_add.c                      \
@@ -82,7 +82,6 @@ softfloat_c_srcs = \
 	s_normRoundPackToF64.c         \
 	s_normSubnormalF32Sig.c        \
 	s_normSubnormalF64Sig.c        \
-	softfloat_state.c              \
 	s_roundPackToF32.c             \
 	s_roundPackToF64.c             \
 	s_roundPackToI32.c             \
@@ -109,6 +108,11 @@ softfloat_c_srcs = \
 	ui32_to_f64.c                  \
 	ui64_to_f32.c                  \
 	ui64_to_f64.c                  \
+	s_commonNaNToF64UI.c   \
+	s_f32UIToCommonNaN.c   \
+	s_f64UIToCommonNaN.c   \
+	s_propagateNaNF32UI.c  \
+	s_propagateNaNF64UI.c  \
 
 softfloat_test_srcs =
 
diff --git a/softfloat/softfloat_raiseFlags.c b/softfloat/softfloat_raiseFlags.c
new file mode 100755
index 0000000..c0c0dc8
--- /dev/null
+++ b/softfloat/softfloat_raiseFlags.c
@@ -0,0 +1,51 @@
+
+/*============================================================================
+
+*** FIX.
+
+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2b.
+
+Written by John R. Hauser.  This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704.  Funding was partially provided by the
+National Science Foundation under grant MIP-9311980.  The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has
+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
+RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) the source code for the derivative work includes prominent notice that
+the work is derivative, and (2) the source code includes prominent notice with
+these four paragraphs for those parts of this code that are retained.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by `flags'.  Floating-point traps can be
+| defined here if desired.  It is currently not possible for such a trap
+| to substitute a result value.  If traps are not implemented, this routine
+| should be simply `float_exception_flags |= flags;'.
+*----------------------------------------------------------------------------*/
+
+void softfloat_raiseFlags( int_fast8_t flags )
+{
+
+    softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/softfloat/softfloat_state.c b/softfloat/softfloat_state.c
deleted file mode 100755
index 8859089..0000000
--- a/softfloat/softfloat_state.c
+++ /dev/null
@@ -1,19 +0,0 @@
-

-/*** COMMENTS. ***/

-

-#include <stdint.h>

-#include "platform.h"

-#include "internals.h"

-#include "specialize.h"

-#include "softfloat.h"

-

-/*----------------------------------------------------------------------------

-| Floating-point rounding mode, extended double-precision rounding precision,

-| and exception flags.

-*----------------------------------------------------------------------------*/

-int_fast8_t softfloat_roundingMode = softfloat_round_nearest_even;

-int_fast8_t softfloat_detectTininess = init_detectTininess;

-int_fast8_t softfloat_exceptionFlags = 0;

-

-int_fast8_t floatx80_roundingPrecision = 80;

-

diff --git a/softfloat/softfloat_types.h b/softfloat/softfloat_types.h
new file mode 100755
index 0000000..215f5e3
--- /dev/null
+++ b/softfloat/softfloat_types.h
@@ -0,0 +1,19 @@
+
+#ifndef softfloat_types_h
+#define softfloat_types_h
+
+/*** COMMENTS. ***/
+
+#include <stdbool.h>
+#include <stdint.h>
+
+typedef uint32_t float32_t;
+typedef uint64_t float64_t;
+typedef struct { uint64_t v; uint16_t x; } floatx80_t;
+typedef struct { uint64_t v[ 2 ]; } float128_t;
+
+#define INLINE inline
+#define INLINE_LEVEL 1
+
+#endif
+
diff --git a/softfloat/specialize.h b/softfloat/specialize.h
new file mode 100755
index 0000000..7a72a49
--- /dev/null
+++ b/softfloat/specialize.h
@@ -0,0 +1,117 @@
+#ifndef _softfloat_specialize_h

+#define _softfloat_specialize_h

+

+/*============================================================================

+

+*** FIX.

+

+This C source fragment is part of the SoftFloat IEC/IEEE Floating-point

+Arithmetic Package, Release 2b.

+

+Written by John R. Hauser.  This work was made possible in part by the

+International Computer Science Institute, located at Suite 600, 1947 Center

+Street, Berkeley, California 94704.  Funding was partially provided by the

+National Science Foundation under grant MIP-9311980.  The original version

+of this code was written as part of a project to build a fixed-point vector

+processor in collaboration with the University of California at Berkeley,

+overseen by Profs. Nelson Morgan and John Wawrzynek.  More information

+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/

+arithmetic/SoftFloat.html'.

+

+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has

+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES

+RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS

+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,

+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE

+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE

+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR

+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.

+

+Derivative works are acceptable, even for commercial purposes, so long as

+(1) the source code for the derivative work includes prominent notice that

+the work is derivative, and (2) the source code includes prominent notice with

+these four paragraphs for those parts of this code that are retained.

+

+=============================================================================*/

+

+#include "softfloat_types.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define softfloat_detectTininess softfloat_tininess_beforeRounding

+

+/*----------------------------------------------------------------------------

+| Structure used to transfer NaN representations from one format to another.

+*----------------------------------------------------------------------------*/

+struct commonNaN {

+    bool sign;

+    uint64_t v64, v0;

+};

+

+/*----------------------------------------------------------------------------

+| The pattern for a default generated single-precision NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF32UI 0xFFFFFFFF

+

+/*----------------------------------------------------------------------------

+| Returns 1 if the single-precision floating-point value `a' is a signaling

+| NaN; otherwise, returns 0.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && ( 1 <= INLINE_LEVEL )

+INLINE bool softfloat_isSigNaNF32UI( uint_fast32_t ui )

+    { return ( ( ui>>22 & 0x1FF ) == 0x1FE ) && ( ui & 0x003FFFFF ); }

+#else

+bool softfloat_isSigNaNF32UI( uint_fast32_t );

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+struct commonNaN softfloat_f32UIToCommonNaN( uint_fast32_t );

+#if defined INLINE_LEVEL && ( 1 <= INLINE_LEVEL )

+INLINE uint_fast32_t softfloat_commonNaNToF32UI( struct commonNaN a )

+    { return (uint_fast32_t) a.sign<<31 | 0x7FFFFFFF; }

+#else

+uint_fast32_t softfloat_commonNaNToF32UI( struct commonNaN );

+#endif

+

+/*----------------------------------------------------------------------------

+| Takes two single-precision floating-point values `a' and `b', one of which

+| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_propagateNaNF32UI( uint_fast32_t, uint_fast32_t );

+

+/*----------------------------------------------------------------------------

+| The pattern for a default generated double-precision NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF64UI UINT64_C(0xFFFFFFFFFFFFFFFF)

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && ( 1 <= INLINE_LEVEL )

+INLINE bool softfloat_isSigNaNF64UI( uint_fast64_t ui )

+{

+    return

+        ( ( ui>>51 & 0xFFF ) == 0xFFE )

+            && ( ui & UINT64_C( 0x0007FFFFFFFFFFFF ) );

+}

+#else

+bool softfloat_isSigNaNF64UI( uint_fast64_t );

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+/*** MIGHT BE INLINE'D. ***/

+struct commonNaN softfloat_f64UIToCommonNaN( uint_fast64_t );

+uint_fast64_t softfloat_commonNaNToF64UI( struct commonNaN );

+

+/*----------------------------------------------------------------------------

+| Takes two double-precision floating-point values `a' and `b', one of which

+| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_propagateNaNF64UI( uint_fast64_t, uint_fast64_t );

+

+#include "../pk/mtrap.h"

+

+#endif