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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-29 00:00:11 -0800 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-29 00:00:11 -0800 |
commit | 39c89b7db54a3a82355e179f33027113b8f69d55 (patch) | |
tree | 36fe9e21a5bae5d24bfd96cf86bbdec8633e7352 /pk | |
parent | d2d2e0a55c08b15a08892d5b89ee939a5986e69e (diff) | |
download | pk-39c89b7db54a3a82355e179f33027113b8f69d55.zip pk-39c89b7db54a3a82355e179f33027113b8f69d55.tar.gz pk-39c89b7db54a3a82355e179f33027113b8f69d55.tar.bz2 |
WIP on priv spec v1.9
Diffstat (limited to 'pk')
-rw-r--r-- | pk/emulation.c | 36 | ||||
-rw-r--r-- | pk/encoding.h | 44 | ||||
-rw-r--r-- | pk/mtrap.h | 3 |
3 files changed, 49 insertions, 34 deletions
diff --git a/pk/emulation.c b/pk/emulation.c index 9b8d65d..fb655ef 100644 --- a/pk/emulation.c +++ b/pk/emulation.c @@ -247,6 +247,29 @@ static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result { switch (num) { + case CSR_TIME: + *result = read_csr(mtime) + HLS()->stime_delta; + return 0; + case CSR_CYCLE: + *result = read_csr(mcycle) + HLS()->scycle_delta; + return 0; + case CSR_INSTRET: + *result = read_csr(minstret) + HLS()->sinstret_delta; + return 0; +#ifdef __riscv32 + case CSR_TIMEH: + *result = (((uint64_t)read_csr(mtimeh) << 32) + read_csr(mtime) + + HLS()->stime_delta) >> 32; + return 0; + case CSR_CYCLEH: + *result = (((uint64_t)read_csr(mcycleh) << 32) + read_csr(mcycle) + + HLS()->scycle_delta) >> 32; + return 0; + case CSR_INSTRETH: + *result = (((uint64_t)read_csr(minstreth) << 32) + read_csr(minstret) + + HLS()->sinstret_delta) >> 32; + return 0; +#endif #ifndef __riscv_hard_float case CSR_FRM: if ((mstatus & MSTATUS_FS) == 0) break; @@ -265,16 +288,17 @@ static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result return -1; } -static inline void emulate_write_csr(int num, uintptr_t value, uintptr_t mstatus) +static inline int emulate_write_csr(int num, uintptr_t value, uintptr_t mstatus) { switch (num) { #ifndef __riscv_hard_float - case CSR_FRM: SET_FRM(value); return; - case CSR_FFLAGS: SET_FFLAGS(value); return; - case CSR_FCSR: SET_FCSR(value); return; + case CSR_FRM: SET_FRM(value); return 0; + case CSR_FFLAGS: SET_FFLAGS(value); return 0; + case CSR_FCSR: SET_FCSR(value); return 0; #endif } + return -1; } DECLARE_EMULATION_FUNC(emulate_system) @@ -300,8 +324,8 @@ DECLARE_EMULATION_FUNC(emulate_system) case 7: new_csr_val = csr_val & ~rs1_num; break; } - if (do_write) - emulate_write_csr(csr_num, new_csr_val, mstatus); + if (do_write && emulate_write_csr(csr_num, new_csr_val, mstatus)) + return truly_illegal_insn(regs, mcause, mepc, mstatus, insn); SET_RD(insn, regs, csr_val); } diff --git a/pk/encoding.h b/pk/encoding.h index 411a7af..1127234 100644 --- a/pk/encoding.h +++ b/pk/encoding.h @@ -647,11 +647,6 @@ #define CSR_SIP 0x144 #define CSR_SPTBR 0x180 #define CSR_SASID 0x181 -#define CSR_CYCLEW 0x900 -#define CSR_TIMEW 0x901 -#define CSR_INSTRETW 0x902 -#define CSR_STIME 0xd01 -#define CSR_STIMEW 0xa01 #define CSR_MSTATUS 0x300 #define CSR_MEDELEG 0x302 #define CSR_MIDELEG 0x303 @@ -664,26 +659,25 @@ #define CSR_MBADADDR 0x343 #define CSR_MIP 0x344 #define CSR_MIPI 0x345 -#define CSR_MTIME 0x701 -#define CSR_MISA 0xf00 -#define CSR_MVENDORID 0xf01 -#define CSR_MARCHID 0xf02 -#define CSR_MIMPID 0xf03 -#define CSR_MCFGADDR 0xf04 -#define CSR_MHARTID 0xf10 +#define CSR_MCYCLE 0xf00 +#define CSR_MTIME 0xf01 +#define CSR_MINSTRET 0xf02 +#define CSR_MISA 0xf10 +#define CSR_MVENDORID 0xf11 +#define CSR_MARCHID 0xf12 +#define CSR_MIMPID 0xf13 +#define CSR_MCFGADDR 0xf14 +#define CSR_MHARTID 0xf15 #define CSR_MTOHOST 0x7c0 #define CSR_MFROMHOST 0x7c1 #define CSR_MRESET 0x7c2 #define CSR_CYCLEH 0xc80 #define CSR_TIMEH 0xc81 #define CSR_INSTRETH 0xc82 -#define CSR_CYCLEHW 0x980 -#define CSR_TIMEHW 0x981 -#define CSR_INSTRETHW 0x982 -#define CSR_STIMEH 0xd81 -#define CSR_STIMEHW 0xa81 #define CSR_MTIMECMPH 0x361 -#define CSR_MTIMEH 0x781 +#define CSR_MCYCLEH 0xf80 +#define CSR_MTIMEH 0xf81 +#define CSR_MINSTRETH 0xf82 #define CAUSE_MISALIGNED_FETCH 0x0 #define CAUSE_FAULT_FETCH 0x1 #define CAUSE_ILLEGAL_INSTRUCTION 0x2 @@ -958,11 +952,6 @@ DECLARE_CSR(sbadaddr, CSR_SBADADDR) DECLARE_CSR(sip, CSR_SIP) DECLARE_CSR(sptbr, CSR_SPTBR) DECLARE_CSR(sasid, CSR_SASID) -DECLARE_CSR(cyclew, CSR_CYCLEW) -DECLARE_CSR(timew, CSR_TIMEW) -DECLARE_CSR(instretw, CSR_INSTRETW) -DECLARE_CSR(stime, CSR_STIME) -DECLARE_CSR(stimew, CSR_STIMEW) DECLARE_CSR(mstatus, CSR_MSTATUS) DECLARE_CSR(medeleg, CSR_MEDELEG) DECLARE_CSR(mideleg, CSR_MIDELEG) @@ -975,7 +964,9 @@ DECLARE_CSR(mcause, CSR_MCAUSE) DECLARE_CSR(mbadaddr, CSR_MBADADDR) DECLARE_CSR(mip, CSR_MIP) DECLARE_CSR(mipi, CSR_MIPI) +DECLARE_CSR(mcycle, CSR_MCYCLE) DECLARE_CSR(mtime, CSR_MTIME) +DECLARE_CSR(minstret, CSR_MINSTRET) DECLARE_CSR(misa, CSR_MISA) DECLARE_CSR(mvendorid, CSR_MVENDORID) DECLARE_CSR(marchid, CSR_MARCHID) @@ -988,13 +979,10 @@ DECLARE_CSR(mreset, CSR_MRESET) DECLARE_CSR(cycleh, CSR_CYCLEH) DECLARE_CSR(timeh, CSR_TIMEH) DECLARE_CSR(instreth, CSR_INSTRETH) -DECLARE_CSR(cyclehw, CSR_CYCLEHW) -DECLARE_CSR(timehw, CSR_TIMEHW) -DECLARE_CSR(instrethw, CSR_INSTRETHW) -DECLARE_CSR(stimeh, CSR_STIMEH) -DECLARE_CSR(stimehw, CSR_STIMEHW) DECLARE_CSR(mtimecmph, CSR_MTIMECMPH) +DECLARE_CSR(mcycleh, CSR_MCYCLEH) DECLARE_CSR(mtimeh, CSR_MTIMEH) +DECLARE_CSR(minstreth, CSR_MINSTRETH) #endif #ifdef DECLARE_CAUSE DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH) @@ -164,6 +164,9 @@ static inline int xlen() typedef struct { volatile uintptr_t* csrs; + uint64_t stime_delta; + uint64_t scycle_delta; + uint64_t sinstret_delta; int hart_id; volatile int mipi_pending; volatile int sipi_pending; |