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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:38:04 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:38:04 -0700 |
commit | 6517fe26a2a0c89c3112f4a383c601572c71d64a (patch) | |
tree | d37eea7ae6f3e15eee94afb5c9c749a4cd800577 /pk/entry.S | |
parent | a4ae7da6ef0c09c2616a0b82f7f569e4e134f75c (diff) | |
download | pk-6517fe26a2a0c89c3112f4a383c601572c71d64a.zip pk-6517fe26a2a0c89c3112f4a383c601572c71d64a.tar.gz pk-6517fe26a2a0c89c3112f4a383c601572c71d64a.tar.bz2 |
Update to new privileged spec
Diffstat (limited to 'pk/entry.S')
-rw-r--r-- | pk/entry.S | 59 |
1 files changed, 18 insertions, 41 deletions
@@ -1,16 +1,7 @@ // See LICENSE for license details. #include "encoding.h" - -#ifdef __riscv64 -# define STORE sd -# define LOAD ld -# define REGBYTES 8 -#else -# define STORE sw -# define LOAD lw -# define REGBYTES 4 -#endif +#include "bits.h" .macro save_tf # save gprs @@ -47,47 +38,42 @@ # get sr, epc, badvaddr, cause addi t0,sp,320 - csrrw t0,mscratch,t0 - csrr t1,mstatus - csrr t2,mepc - csrr t3,mcause + csrrw t0,sscratch,t0 + csrr t1,sstatus + csrr t2,sepc + csrr t3,scause STORE t0,2*REGBYTES(x2) STORE t1,32*REGBYTES(x2) STORE t2,33*REGBYTES(x2) STORE t3,35*REGBYTES(x2) - la gp, _gp - # get faulting insn, if it wasn't a fetch-related trap li x5,-1 STORE x5,36*REGBYTES(x2) 1: .endm - .section .text.init,"ax",@progbits + .text .global trap_entry trap_entry: - # entry point for reset - j _start - - # entry point when coming from machine mode - j 1f - - # entry point when coming from other modes - csrrw sp, mscratch, sp + csrrw sp, sscratch, sp 1:addi sp,sp,-320 save_tf move a0,sp - j handle_trap + j handle_trap .globl pop_tf pop_tf: # write the trap frame onto the stack - # restore sr (disable interrupts) and epc - LOAD a1,32*REGBYTES(a0) - LOAD a2,33*REGBYTES(a0) - csrw mstatus, a1 - csrw mepc, a2 + # restore sstatus and epc + csrc sstatus, SSTATUS_IE + li t0, SSTATUS_PS + LOAD t1, 32*REGBYTES(a0) + LOAD t2, 33*REGBYTES(a0) + csrc sstatus, t0 + and t0, t0, t1 + csrs sstatus, t0 + csrw sepc, t2 # restore x registers LOAD x1,1*REGBYTES(a0) @@ -124,13 +110,4 @@ pop_tf: # write the trap frame onto the stack LOAD x10,10*REGBYTES(a0) # gtfo - mret - - - .bss - .align 4 - .global stack_bot - .global stack_top -stack_bot: - .skip 4096 -stack_top: + sret |