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author | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:30:58 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:30:58 -0700 |
commit | 3473915b3a3fd925a68fc3260c64824cab2846d2 (patch) | |
tree | a24e8d3991fd6c5619d752a2ae8a5442461964e3 /machine/mtrap.c | |
parent | 96e5ed750e7447f2c0316368e5592fd331ee345c (diff) | |
download | pk-3473915b3a3fd925a68fc3260c64824cab2846d2.zip pk-3473915b3a3fd925a68fc3260c64824cab2846d2.tar.gz pk-3473915b3a3fd925a68fc3260c64824cab2846d2.tar.bz2 |
Separate page faults from physical memory access exceptions
Diffstat (limited to 'machine/mtrap.c')
-rw-r--r-- | machine/mtrap.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/machine/mtrap.c b/machine/mtrap.c index 15859d1..6e85d26 100644 --- a/machine/mtrap.c +++ b/machine/mtrap.c @@ -167,6 +167,11 @@ void redirect_trap(uintptr_t epc, uintptr_t mstatus) return __redirect_trap(); } +void pmp_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc) +{ + redirect_trap(mepc, read_csr(mstatus)); +} + static void machine_page_fault(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc) { // MPRV=1 iff this trap occurred while emulating an instruction on behalf @@ -184,8 +189,11 @@ void trap_from_machine_mode(uintptr_t* regs, uintptr_t dummy, uintptr_t mepc) switch (mcause) { - case CAUSE_FAULT_LOAD: - case CAUSE_FAULT_STORE: + case CAUSE_LOAD_PAGE_FAULT: + case CAUSE_STORE_PAGE_FAULT: + case CAUSE_FETCH_ACCESS: + case CAUSE_LOAD_ACCESS: + case CAUSE_STORE_ACCESS: return machine_page_fault(regs, dummy, mepc); default: bad_trap(regs, dummy, mepc); |