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| author | Andrew Waterman <andrew@sifive.com> | 2017-02-25 15:32:40 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-02-25 15:32:40 -0800 |
| commit | 410fb0384f0fac770ab89b675939790d9253bbf1 (patch) | |
| tree | 9fa308c55007e01bef77ebe12ae7f3d8e387f4dc /machine/emulation.c | |
| parent | 34979b93458d685df65a49bca3084eb8283439da (diff) | |
| download | pk-410fb0384f0fac770ab89b675939790d9253bbf1.zip pk-410fb0384f0fac770ab89b675939790d9253bbf1.tar.gz pk-410fb0384f0fac770ab89b675939790d9253bbf1.tar.bz2 | |
New counter-enable scheme
https://github.com/riscv/riscv-isa-manual/issues/10
Diffstat (limited to 'machine/emulation.c')
| -rw-r--r-- | machine/emulation.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/machine/emulation.c b/machine/emulation.c index 696467d..25b39af 100644 --- a/machine/emulation.c +++ b/machine/emulation.c @@ -150,9 +150,9 @@ DECLARE_EMULATION_FUNC(truly_illegal_insn) static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result) { - uintptr_t counteren = - EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U ? read_csr(mucounteren) : - read_csr(mscounteren); + uintptr_t counteren = -1; + if (EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U) + counteren = read_csr(scounteren); switch (num) { |