Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2024-08-21 | arc64: Add port for Synopsys DesignWare ARCv3 ISA | Yuriy Kolerov | 1 | -1/+1 |
2024-05-22 | pru: Do not define MISSING_SYSCALL_NAMES for pru | Dimitar Dimitrov | 1 | -0/+1 |
2023-08-24 | libgloss: add Xtensa port | Alexey Lapshin | 1 | -0/+1 |
2022-02-01 | libgloss: merge epiphany & libnosys & or1k configure scripts up a level | Mike Frysinger | 1 | -0/+27 |