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2005-03-28merge from gccDJ Delorie1-44/+32
2005-03-28merge from gccDJ Delorie4-122/+38
2005-03-28merge from gccDJ Delorie7-106/+105
2005-03-27merge from gccDJ Delorie3-86/+90
2005-03-25merge from gccDJ Delorie2-0/+8
2005-03-23Undo previous deltaNick Clifton2-8/+1
2005-03-23(getopt): Allow full prototype when builind under FreeBSD.Nick Clifton2-1/+8
2005-03-23merge from gccDJ Delorie2-1/+5
2005-03-22 * dwarf.h: Merge with GCC's dwarf.h.Ben Elliston2-25/+33
2005-03-22include ChangeLogBob Wilson2-2/+17
* xtensa-isa.h: Update a comment and whitespace. bfd ChangeLog * xtensa-isa.c (xtensa_opcode_lookup, xtensa_state_lookup, xtensa_sysreg_lookup_name, xtensa_interface_lookup, xtensa_funcUnit_lookup): Skip bsearch call if count is zero. (xtensa_opcode_decode): Rearrange code.
2005-03-18Add support for generating PLT lookups for the ColdFire.Nick Clifton2-1/+6
2005-03-18 * elf32-arm.c (elf32_arm_modify_segment_map): New function.Mark Mitchell2-0/+9
(elf32_arm_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Define. (elf_backend_additional_program_headers): Likewise. (elf32_arm_symbian_modify_segment_map): Use elf32_arm_modify_segment_map. * binutils/readelf.c (get_arm_segment_type): New function. (get_segment_type): Use it. * arm.h (PT_ARM_EXIDX): Define.
2005-03-16bfd/H.J. Lu2-0/+7
2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * elflink.c (elf_mark_used_section): New. (bfd_elf_gc_sections): Call elf_gc_mark_section for non-relocatable link if we don't do GC. include/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * bfdlink.h (bfd_link_info): Add gc_sections. ld/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove unused empty output sections for non-relocatable link. * ld.h (args_type): Remove gc_sections. * ldlang.c (lang_mark_used_section): New. (lang_gc_sections): Use link_info.gc_sections instead of command_line.gc_sections. * ldmain.c (main): Likewise. * lexsup.c (parse_args): Likewise. * ldlang.c (lang_process): Call lang_mark_used_section. * ldmain.c (main): Initialize link_info.gc_sections to FALSE. ld/testsuite/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * ld-alpha/tlsbin.rd: Updated for empty section removal. * ld-alpha/tlsbinr.rd: Likewise. * ld-alpha/tlspic.rd: Likewise. * ld-arm/mixed-lib.sym: Likewise. * ld-i386/tlsbin.rd: Likewise. * ld-i386/tlsnopic.rd: Likewise. * ld-i386/tlspic.rd: Likewise. * ld-ia64/tlsbin.rd: Likewise. * ld-ia64/tlspic.rd: Likewise. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-s390/tlsbin.rd: Likewise. * ld-s390/tlsbin_64.rd: Likewise. * ld-s390/tlspic.rd: Likewise. * ld-s390/tlspic_64.rd: Likewise. * ld-sh/tlsbin-2.d: Likewise. * ld-sh/tlspic-2.d: Likewise. * ld-sparc/tlssunbin32.rd: Likewise. * ld-sparc/tlssunnopic32.rd: Likewise. * ld-sparc/tlssunpic32.rd: Likewise. * ld-x86-64/tlsbin.rd: Likewise. * ld-x86-64/tlspic.rd: Likewise.
2005-03-12include:Zack Weinberg2-4/+15
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T. Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, and ARM_ARCH_V6ZKT2. opcodes: * arm-dis.c (arm_opcodes): Document %E and %V. Add entries for v6T2 ARM instructions: bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx. (print_insn_arm): Add support for %E and %V.
2005-03-10merge from gccDJ Delorie2-0/+13
2005-03-03update copyright datesAlan Modra47-50/+59
2005-03-02 * mips.h: Define MIPS TLS relocations.Daniel Jacobowitz2-2/+22
2005-03-01merge from gccDJ Delorie2-0/+8
2005-02-20include/Alan Modra5-8/+18
* xtensa-isa-internal.h (xtensa_length_decode_fn): Warning fix. * xtensa-isa.h (xtensa_insnbuf_to_chars): Likewise. (xtensa_insnbuf_from_chars, xtensa_isa_length_from_chars): Likewise. include/coff/ * xcoff.h (struct xcoff_loader_info): Warning fix. bfd/ * bfd-in.h (bfd_elf_bfd_from_remote_memory): Warning fix. * coff-m68k.c (bfd_m68k_coff_create_embedded_relocs): Likewise. * coff-rs6000.c (xcoff_write_armap_big): Warning fixes. Remove useless assignments. (xcoff_write_archive_contents_big): Likewise. (_bfd_xcoff_put_ldsymbol_name): Likewise. * coff64-rs6000.c (_bfd_xcoff64_put_ldsymbol_name): Likewise. * coffgen.c (coff_write_symbols): Make "written" a bfd_vma. * cofflink.c (process_embedded_commands): Warning fixes. * cpu-arm.c: Delete unnecessary prototypes. Convert to C90. Warning fixes. * dwarf2.c: Warning fixes. * elf-bfd.h: Likewise. * elf-eh-frame.c: Likewise. * elf-strtab.c: Likewise. * elf.c: Likewise. * elf32-m68k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Delete unnecessary prototypes. Warning fixes. * elf64-sh64.c: Likewise. * peicode.h: Likewise. * elf64-mmix.c: Warning fixes. * elfcode.h: Likewise. * elfxx-mips.c: Likewise. * libbfd-in.h: Likewise. * libbfd.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pef.c: Likewise. * srec.c: Likewise. * vms-hdr.c: Likewise. * vms-tir.c: Likewise. * xtensa-isa.c: Likewise. * xtensa-modules.c: Likewise. * xsym.c: Likewise. (pstrcmp): Use correct choice of string lengths. Fix return value. (bfd_sym_module_name): Correct string length. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2005-02-15bfd/:Maciej W. Rozycki2-0/+16
2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rel. * elf64-mips.c (mips16_elf64_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_elf64_howto_table_rela): New array for MIPS16 RELA reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel. * elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders. (elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel. (elf_mips16_gprel_howto): Likewise. Redefine src_mask and dst_mask. (mips16_gprel_reloc): Remove bit shuffling; call _bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp() and _bfd_mips16_elf_reloc_shuffle() instead. (mips16_reloc_map): New reloc map for MIPS16 relocs. (bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16 relocs. (mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from elf_mips16_howto_table_rela or elf_mips16_howto_table_rel. * elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to handle bit shuffling for MIPS16 relocs. (_bfd_mips16_elf_reloc_shuffle): Likewise. (_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle(). (_bfd_mips_elf_generic_reloc): Likewise. (mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. (mips_elf_obtain_contents): Remove bit shuffling. (mips_elf_perform_relocation): Likewise; call _bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle() instead. (_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16 and R_MIPS16_LO16. * elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare. (_bfd_mips16_elf_reloc_shuffle): Likewise. * reloc.c (BFD_RELOC_MIPS16_HI16): New reloc. (BFD_RELOC_MIPS16_HI16_S): Likewise. (BFD_RELOC_MIPS16_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * config/tc-mips.c (reloc_needs_lo_p): Handle BFD_RELOC_MIPS16_HI16_S. (fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16. (append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow complaints on. (mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S, BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants. Call my_getSmallExpression() to parse percent operators. (percent_op_match, mips_percent_op): Separate definitions. (mips16_percent_op): Define percent operators for the MIPS16 mode. (parse_relocation): Handle the MIPS16 mode using mips16_percent_op. (md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16, BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16. gas/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI. * gas/mips/mips16-hilo.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. include/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * elf/mips.h (R_MIPS16_GOT16): New reloc code. (R_MIPS16_CALL16): Likewise. (R_MIPS16_HI16): Likewise. (R_MIPS16_LO16): Likewise. (R_MIPS16_min): New fake reloc code. (R_MIPS16_max): Likewise. ld/testsuite/: 2005-02-15 Nigel Stephens <nigel@mips.com> Maciej W. Rozycki <macro@mips.com> * ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and R_MIPS16_LO16 relocs. * ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI. * ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests. * ld-mips-elf/mips-elf.exp: Run the new tests.
2005-02-14merge from gccDJ Delorie2-0/+10
2005-02-11* mips.h (R_MIPS_max): Use FAKE_RELOC to define.Maciej W. Rozycki2-1/+5
2005-02-09gas/testsuite/Jan Beulich2-7/+14
2005-02-09 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.s: Remove comments disabling alternative forms of fbld, fbstp, and fldcw. * gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw. include/opcode/ 2005-02-09 Jan Beulich <jbeulich@novell.com> PR gas/707 * i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and fnstsw.
2005-02-03include/Alan Modra2-0/+5
* bfdlink.h (struct bfd_link_hash_entry): Add u.undef.weak. bfd/ * linker.c (_bfd_generic_link_add_one_symbol): Set u.undef.weak. * elflink.c (elf_smash_syms): Restore symbols that were undefweak before the as-needed lib was loaded. Abort on unexpected refs.
2005-02-01include/Alan Modra2-1/+9
* bfdlink.h (bfd_link_repair_undef_list): Declare. bfd/ * elf64-ppc.c (ppc64_elf_check_directives): Move undefs list fixup.. * linker.c (bfd_link_repair_undef_list): ..to new function, but don't remove anything but new and undefweak. * elflink.c (_bfd_elf_link_create_dynamic_sections): Override any existing _DYNAMIC. (_bfd_elf_create_dynamic_sections): Formatting. (bfd_elf_record_link_assignment): Call bfd_link_repair_undef_list. (_bfd_elf_merge_symbol): Don't handle as-needed syms here. (struct elf_smash_data): New. (elf_smash_syms): New function. (elf_link_add_object_symbols): Call elf_smash_syms. Don't add unneeded dynamic objects to loaded list. (elf_link_output_extsym): Don't handle as-needed here. Strip bfd_link_hash_new symbols. * elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't delref when dynindx is already -1. * elf64-alpha.c (elf64_alpha_output_extsym): Strip bfd_link_hash_new symbols. * elfxx-mips.c (mips_elf_output_extsym): Likewise. ld/ * ld.texinfo: Clarify --as-needed operation.
2005-01-28 * callback.h (struct host_callback_struct): New members pipe,Hans-Peter Nilsson2-0/+38
pipe_empty, pipe_nonempty, ispipe, pipe_buffer and target_sizeof_int. (CB_SYS_pipe): New macro.
2005-01-28 * callback.h: Include "bfd.h".Hans-Peter Nilsson2-0/+13
(struct host_callback_struct): New member target_endian. (cb_store_target_endian): Declare.
2005-01-25bfd/ChangeLog:Alexandre Oliva4-2/+32
2004-12-10 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (elf32_frv_relocate_section): Force local binding for TLSMOFF. * reloc.c: Add R_FRV_TLSMOFF. * elf32-frv.c (elf32_frv_howto_table): Likewise. (frv_reloc_map, frv_reloc_type_lookup): Map it. (elf32_frv_relocate_section): Handle it. (elf32_frv_check_relocs): Likewise. * libbfd.h, bfd-in2.h: Rebuilt. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash when given an undefweak TLS symbol. Fix constant TLS PLT entries such that they return the constant in gr9. (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS symbols. (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections. too, such that they shrink on relaxation. (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as marking the position right past the _GLOBAL_OFFSET_TABLE_ value. (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries if we can guarantee the use of 16-bit constants. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> Introduce TLS support for FR-V FDPIC. * reloc.c: Add TLS relocations. * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations. (elf32_frv_rel_tlsdesc_value_howto): New. (elf32_frv_rel_tlsoff_howto): New. (frv_reloc_map): Add new mappings. (struct frvfdpic_elf_link_hash_table): Add pointer to summary reloc information. (frvfdpic_dynamic_got_plt_info): New. (frvfdpic_plt_tls_ret_offset): New. (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier. (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members. (struct _frvfdpic_dynamic_got_plt_info): Likewise. (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute section as local. (struct frvfdpic_relocs_info): Add TLS fields. (frvfdpic_relocs_info_hash): Warning clean up. (frvfdpic_relocs_info_find): Initialize tlsplt_entry. (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields. (FRVFDPIC_TLS_BIAS): Define. (tls_biased_base): New. (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS relocations. (frv_reloc_type_lookup): Likewise. (frvfdpic_info_to_howto_rel): Likewise. (elf32_frv_relocate_section): Likewise. (_frv_create_got_section): Create the PLT section here. (elf32_frvfdpic_create_dynamic_sections): Not here. (_frvfdpic_count_nontls_entries): Move out of... (_frvfdpic_count_got_plt_entries): ... here. (_frvfdpic_count_tls_entries): Likewise. Add TLS support. (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation support. (_frvfdpic_relax_tls_entries): New. (_frvfdpic_compute_got_alloc_data): Add TLS support. (_frvfdpic_get_tlsdesc_entry): New. (_frvfdpic_assign_got_entries): Add TLS support. (_frvfdpic_assign_plt_entries): Likewise. (_frvfdpic_reset_got_plt_entries): New. (_frvfdpic_size_got_plt): Move out of... (elf32_frvfdpic_size_dynamic_sections): ... here. (_frvfdpic_relax_got_plt_entries): New. (elf32_frvfdpic_relax_section): New. (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check. (elf32_frv_check_relocs): Add TLS support. (bfd_elf32_bfd_relax_section): Define for FDPIC. * libbfd.h, bfd-in2.h: Rebuilt. cpu/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.cpu: Add support for TLS annotations in loads and calll. * frv.opc (parse_symbolic_address): New. (parse_ldd_annotation): New. (parse_call_annotation): New. (parse_ld_annotation): New. (parse_ulo16, parse_uslo16): Use parse_symbolic_address. Introduce TLS relocations. (parse_d12, parse_s12, parse_u12): Likewise. (parse_uhi16): Likewise. Fix constant checking on 64-bit host. (parse_call_label, print_at): New. gas/ChangeLog: * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such. 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.c (gas_cgen_parse_operand): Handle CGEN_PARSE_OPERAND_SYMBOLIC. * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations. (frv_force_relocation): Likewise. Fix handling of PIC relocations. (md_apply_fix3): Likewise. include/elf/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add R_FRV_TLSMOFF. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add TLS relocations. include/opcode/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.h (enum cgen_parse_operand_type): Add CGEN_PARSE_OPERAND_SYMBOLIC. ld/testsuite/ChangeLog: * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS. * ld-frv/tls.exp: Likewise. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-3.s: New. * ld-frv/tls-static-3.d: New. * ld-frv/tls-dynamic-3.d: New. * ld-frv/tls-pie-3.d: New. * ld-frv/tls-shared-3.d: New. * ld-frv/tls-relax-static-3.d: New. * ld-frv/tls-relax-dynamic-3.d: New. * ld-frv/tls-relax-pie-3.d: New. * ld-frv/tls-relax-shared-3.d: New. * ld-frv/tls.exp: Run the new tests. * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-1-dep.s: New. * ld-frv/tls-1-shared.lds: New. * ld-frv/tls-1.s: New. * ld-frv/tls-2.s: New. * ld-frv/tls-dynamic-1.d: New. * ld-frv/tls-dynamic-2.d: New. * ld-frv/tls-initial-shared-2.d: New. * ld-frv/tls-pie-1.d: New. * ld-frv/tls-relax-dynamic-1.d: New. * ld-frv/tls-relax-dynamic-2.d: New. * ld-frv/tls-relax-initial-shared-2.d: New. * ld-frv/tls-relax-pie-1.d: New. * ld-frv/tls-relax-shared-1.d: New. * ld-frv/tls-relax-shared-2.d: New. * ld-frv/tls-relax-static-1.d: New. * ld-frv/tls-shared-1-fail.d: New. * ld-frv/tls-shared-1.d: New. * ld-frv/tls-shared-2.d: New. * ld-frv/tls-static-1.d: New. * ld-frv/tls.exp: New. * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. opcodes/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c: Rebuilt. * frv-desc.c: Rebuilt. * frv-desc.h: Rebuilt. * frv-dis.c: Rebuilt. * frv-ibld.c: Rebuilt. * frv-opc.c: Rebuilt. * frv-opc.h: Rebuilt.
2005-01-21 2005-01-21 Fred Fish <fnf@specifixinc.com>Fred Fish2-3/+9
* mips.h: Change INSN_ALIAS to INSN2_ALIAS. Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC. Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
2005-01-19 2005-01-19 Fred Fish <fnf@specifixinc.com>Fred Fish2-4/+21
* mips.h (struct mips_opcode): Add new pinfo2 member. (INSN_ALIAS): New define for opcode table entries that are specific instances of another entry, such as 'move' for an 'or' with a zero operand. (INSN_READ_MDMX_ACC): Redefine from 0 to 0x2. (INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
2005-01-17Fix SH2A machine variants in order to correctly select instruction inheritanceNick Clifton2-2/+17
2005-01-12include/elf/Alan Modra2-2/+9
* ppc.h (R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Define. (R_PPC_RELAX32, R_PPC_RELAX32PC): Adjust value. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Delete RELAX32* entries. (ppc_elf_relax_section): Use PLT variants of RELAX32 relocs for reaching PLT. (ppc_elf_relocate_section): Handle R_PPC_RELAX32_PLT and R_PPC_RELAX32PC_PLT.
2005-01-10Add support for maxq10 and maxq20 machine valuesNick Clifton2-4/+13
2005-01-10binutils/:Andreas Schwab2-0/+17
* configure.in: Don't define SKIP_ZEROES. * configure: Regenerate. * objdump.c (disassemble_data): Set skip_zeroes and skip_zeroes_at_end in disasm_info to defaults. (DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define. (DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and always define. (disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from objdump_disasm_info. include/: * dis-asm.h (struct disassemble_info): Add skip_zeroes and skip_zeroes_at_end. opcodes/: * disassemble.c (disassemble_init_for_target) <case bfd_arch_ia64>: Set skip_zeroes to 16. <case bfd_arch_tic4x>: Set skip_zeroes to 32.
2004-12-22Add support for the new R_AVR_LDI, R_AVR_6 and R_AVR_6_ADIW relocs for theNick Clifton2-13/+21
LDI, ADIW/SBIW and LDD/STD instructions.
2004-12-16include/elf/Richard Sandiford2-0/+5
* v850.h (R_V850_LO16_SPLIT_OFFSET): New reloc. bfd/ * reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type. * elf32-v850.c (v850_elf_howto_table): Add entry for R_V850_LO16_SPLIT_OFFSET. (v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET. (v850_elf_perform_lo16_relocation): New function, extracted from... (v850_elf_perform_relocation): ...here. Use it to handle R_V850_LO16_SPLIT_OFFSET. (v850_elf_check_relocs, v850_elf_final_link_relocate): Handle R_V850_LO16_SPLIT_OFFSET. * libbfd.h, bfd-in2.h: Regenerate. gas/ * config/tc-v850.c (handle_lo16): New function. (v850_reloc_prefix): Use it to check lo(). (md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET. gas/testsuite/ * gas/v850/split-lo16.{s,d}: New test. * gas/v850/v850.exp: Run it. ld/testsuite/ * ld-v850: New directory.
2004-12-15 * callback.h (CB_SYS_truncate, CB_SYS_ftruncate): New macros.Hans-Peter Nilsson2-0/+6
2004-12-13Correct attribution last changesHans-Peter Nilsson1-1/+1
2004-12-13 * callback.h (CB_SYS_rename): New macro.Hans-Peter Nilsson2-1/+3
2004-12-13 * callback.h (struct host_callback_struct): New member lstat.Hans-Peter Nilsson2-0/+9
(CB_SYS_lstat): New macro.
2004-12-10merge from gccDJ Delorie2-1/+6
2004-12-09 * mips.h (CPU_RM9000): Define.Ian Lance Taylor2-0/+7
(OPCODE_IS_MEMBER): Handle CPU_RM9000.
2004-12-09 * mips.h (E_MIPS_MACH_9000): Define.Ian Lance Taylor2-0/+5
2004-11-292004-11-29 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi2-49/+47
* opcode/crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4. Remove redundant instruction types. (struct argument): X_op - new field. (struct cst4_entry): Remove. (no_op_insn): Declare.
2004-11-25gas/Jan Beulich2-9/+19
2004-11-25 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (optimize_imm): Adjust immediates to only those permissible for the selected instruction suffix. (process_suffix): For DefaultSize instructions, suppressing the guessing of a 'q' suffix if the instruction doesn't support it is pointless, because only an 'l' suffix can be guessed in this place. gas/testsuite/ 2004-11-25 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-inval.[sl]: Remove sahf/lahf. include/opcode/ 2004-11-25 Jan Beulich <jbeulich@novell.com> * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves to/from test registers are illegal in 64-bit mode. Add missing NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix (previously one had to explicitly encode a rex64 prefix). Re-enable lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
2004-11-23gas/Jan Beulich2-25/+33
2004-11-23 Jan Beulich <jbeulich@novell.com> * config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to indicate the MMX extensions added by both SSE and 3DNow!A. (Cpu3dnowA): Declare. (CpuUnknownFlags): Update. * config/tc-i386.c (cpu_sub_arch_name): Declare. (cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies 3DNow!. Athlon additionally implies 3DNow!A. Several new entries (those starting with a dot are for sub-arch specification). (set_cpu_arch): Handle sub-arch specifications. (parse_insn): Distinguish between instructions not supported because of insufficient CPU features and because of 64-bit mode. * doc/c-i386.texi: Describe enhanced .arch directive. include/opcode/ 2004-11-23 Jan Beulich <jbeulich@novell.com> * i386.h (i386_optab): paddq and psubq, even in their MMX form, are available only with SSE2. Change the MMX additions introduced by SSE and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A instructions by their now designated identifier (since combining i686 and 3DNow! does not really imply 3DNow!A).
2004-11-19include/opcode/Alan Modra2-91/+5
* msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes, struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c. gas/ * config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes, struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
2004-11-15bfd/Paul Brook2-1/+10
* elf-bfd.h (_bfd_elf_slurp_version_tables): Update prototype. * elf.c (_bfd_elf_print_private_bfd_data): Pass extra argument. (_bfd_elf_slurp_version_tables): Add extra argument. Create extra default version definition for unversioned symbols. * elfcode.h (elf_slurp_symbol_table): Pass extra argument. * elflink.c (elf_link_add_object_symbols): Pass extra argument to _bfd_elf_slurp_version_tables. Set default version for unversioned imported symbols. include/ * bfdlink.h (bfd_link_info): Add default_imported_symver. ld/ * ld.texinfo: Document --default-imported-symver. * ldmain.c (main): Set link_info.default_imported_symver. * lexsup.c (option_values): Add OPTION_DEFAULT_IMPORTED_SYMVER. (ld_options): Add --default-imported-symver. (parse_args): Handle OPTION_DEFAULT_IMPORTED_SYMVER.
2004-11-122004-11-12 Bob Wilson <bob.wilson@acm.org>Bob Wilson3-0/+19
include/ChangeLog * xtensa-isa-internal.h (xtensa_interface_internal): Add class_id. * xtensa-isa.h (xtensa_interface_class_id): New prototype. bfd/ChangeLog * xtensa-isa.c (xtensa_interface_class_id): New. gas/ChangeLog * config/tc-xtensa.c (finish_vinsn): Clear pending instruction if there is a conflict. (check_t1_t2_reads_and_writes): Check for both reads and writes to interfaces that are related as determined by xtensa_interface_class_id.
2004-11-08Add support fpr MAXQ processorNick Clifton6-1/+1201
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