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2003-04-19This commit was manufactured by cvs2svn to create branch 'add-fakeroots-github/add-fakeroots-diradd-fakeroots-dircvs2svn221-55026/+0
dir'. Sprout from kettenis_i386newframe-20030419-branch 2003-04-19 00:19:41 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Delete: Makefile.tpl README README-maintainer-mode config-ml.in config.guess config.if config.sub config/ChangeLog config/accross.m4 config/acinclude.m4 config/acx.m4 config/mh-armpic config/mh-cxux config/mh-cygwin config/mh-decstation config/mh-dgux386 config/mh-djgpp config/mh-elfalphapic config/mh-i370pic config/mh-ia64pic config/mh-interix config/mh-lynxrs6k config/mh-m68kpic config/mh-mingw32 config/mh-ncr3000 config/mh-necv4 config/mh-papic config/mh-ppcpic config/mh-s390pic config/mh-sco config/mh-solaris config/mh-sparcpic config/mh-sysv4 config/mh-sysv5 config/mh-x86pic config/mt-alphaieee config/mt-d30v config/mt-linux config/mt-netware config/mt-ospace config/mt-v810 config/mt-wince configure configure.in djunpack.bat etc/ChangeLog etc/Makefile.in etc/add-log.el etc/add-log.vi etc/configbuild.ein etc/configbuild.fig etc/configbuild.jin etc/configbuild.tin etc/configdev.ein etc/configdev.fig etc/configdev.jin etc/configdev.tin etc/configure etc/configure.in etc/configure.texi etc/fdl.texi etc/make-stds.texi etc/standards.texi etc/texi2pod.pl gettext.m4 include/COPYING include/ChangeLog include/MAINTAINERS include/alloca-conf.h include/ansidecl.h include/aout/ChangeLog include/aout/adobe.h include/aout/aout64.h include/aout/ar.h include/aout/dynix3.h include/aout/encap.h include/aout/host.h include/aout/hp.h include/aout/hp300hpux.h include/aout/hppa.h include/aout/ranlib.h include/aout/reloc.h include/aout/stab.def include/aout/stab_gnu.h include/aout/sun4.h include/bfdlink.h include/bin-bugs.h include/bout.h include/coff/ChangeLog include/coff/a29k.h include/coff/alpha.h include/coff/apollo.h include/coff/arm.h include/coff/aux-coff.h include/coff/ecoff.h include/coff/external.h include/coff/go32exe.h include/coff/h8300.h include/coff/h8500.h include/coff/i386.h include/coff/i860.h include/coff/i960.h include/coff/ia64.h include/coff/internal.h include/coff/m68k.h include/coff/m88k.h include/coff/mcore.h include/coff/mips.h include/coff/mipspe.h include/coff/or32.h include/coff/pe.h include/coff/powerpc.h include/coff/rs6000.h include/coff/rs6k64.h include/coff/sh.h include/coff/sparc.h include/coff/sym.h include/coff/symconst.h include/coff/ti.h include/coff/tic30.h include/coff/tic4x.h include/coff/tic54x.h include/coff/tic80.h include/coff/w65.h include/coff/we32k.h include/coff/xcoff.h include/coff/z8k.h include/demangle.h include/dis-asm.h include/dyn-string.h include/elf/ChangeLog include/elf/alpha.h include/elf/arc.h include/elf/arm.h include/elf/avr.h include/elf/common.h include/elf/cris.h include/elf/d10v.h include/elf/d30v.h include/elf/dlx.h include/elf/dwarf.h include/elf/dwarf2.h include/elf/external.h include/elf/fr30.h include/elf/frv.h include/elf/h8.h include/elf/hppa.h include/elf/i370.h include/elf/i386.h include/elf/i860.h include/elf/i960.h include/elf/ia64.h include/elf/internal.h include/elf/ip2k.h include/elf/iq2000.h include/elf/m32r.h include/elf/m68hc11.h include/elf/m68k.h include/elf/mcore.h include/elf/mips.h include/elf/mmix.h include/elf/mn10200.h include/elf/mn10300.h include/elf/msp430.h include/elf/openrisc.h include/elf/or32.h include/elf/pj.h include/elf/ppc.h include/elf/ppc64.h include/elf/reloc-macros.h include/elf/s390.h include/elf/sh.h include/elf/sparc.h include/elf/v850.h include/elf/vax.h include/elf/x86-64.h include/elf/xstormy16.h include/elf/xtensa.h include/fibheap.h include/filenames.h include/floatformat.h include/fnmatch.h include/fopen-bin.h include/fopen-same.h include/fopen-vms.h include/gdb/ChangeLog include/gdb/callback.h include/gdb/remote-sim.h include/gdb/signals.h include/gdb/sim-arm.h include/gdb/sim-d10v.h include/gdb/sim-h8300.h include/gdb/sim-sh.h include/gdbm.h include/getopt.h include/hashtab.h include/hp-symtab.h include/ieee.h include/libiberty.h include/md5.h include/mpw/ChangeLog include/mpw/README include/mpw/dir.h include/mpw/dirent.h include/mpw/fcntl.h include/mpw/grp.h include/mpw/mpw.h include/mpw/pwd.h include/mpw/spin.h include/mpw/stat.h include/mpw/sys/file.h include/mpw/sys/param.h include/mpw/sys/resource.h include/mpw/sys/stat.h include/mpw/sys/time.h include/mpw/sys/types.h include/mpw/utime.h include/mpw/varargs.h include/nlm/ChangeLog include/nlm/alpha-ext.h include/nlm/common.h include/nlm/external.h include/nlm/i386-ext.h include/nlm/internal.h include/nlm/ppc-ext.h include/nlm/sparc32-ext.h include/oasys.h include/objalloc.h include/obstack.h include/opcode/ChangeLog include/opcode/a29k.h include/opcode/alpha.h include/opcode/arc.h include/opcode/arm.h include/opcode/avr.h include/opcode/cgen.h include/opcode/convex.h include/opcode/cris.h include/opcode/d10v.h include/opcode/d30v.h include/opcode/dlx.h include/opcode/h8300.h include/opcode/hppa.h include/opcode/i370.h include/opcode/i386.h include/opcode/i860.h include/opcode/i960.h include/opcode/ia64.h include/opcode/m68hc11.h include/opcode/m68k.h include/opcode/m88k.h include/opcode/mips.h include/opcode/mmix.h include/opcode/mn10200.h include/opcode/mn10300.h include/opcode/msp430.h include/opcode/np1.h include/opcode/ns32k.h include/opcode/or32.h include/opcode/pdp11.h include/opcode/pj.h include/opcode/pn.h include/opcode/ppc.h include/opcode/pyr.h include/opcode/s390.h include/opcode/sparc.h include/opcode/tahoe.h include/opcode/tic30.h include/opcode/tic4x.h include/opcode/tic54x.h include/opcode/tic80.h include/opcode/v850.h include/opcode/vax.h include/os9k.h include/partition.h include/progress.h include/safe-ctype.h include/sort.h include/splay-tree.h include/symcat.h include/ternary.h include/xregex.h include/xregex2.h include/xtensa-config.h include/xtensa-isa-internal.h include/xtensa-isa.h install-sh libtool.m4 ltcf-c.sh ltcf-cxx.sh ltcf-gcj.sh ltconfig ltmain.sh makefile.vms missing mkdep mkinstalldirs move-if-change mpw-README mpw-build.in mpw-config.in mpw-configure mpw-install setup.com src-release symlink-tree texinfo/texinfo.tex ylwrap
2003-04-19This commit was manufactured by cvs2svn to create branchkettenis_i386newframe-20030419-branchpointcvs2svn9-30/+48
'kettenis_i386newframe-20030419-branch'. Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie <dj@redhat.com> '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.': ChangeLog Makefile.in Makefile.tpl configure configure.in include/coff/ChangeLog include/coff/h8300.h include/coff/h8500.h include/coff/sh.h include/elf/ChangeLog include/elf/common.h include/opcode/ChangeLog include/opcode/h8300.h include/opcode/mips.h libtool.m4
2003-04-04This commit was manufactured by cvs2svn to create branchkettenis_i386newframe-20030406-branchpointgithub/kettenis_i386newframe-20030406-branchkettenis_i386newframe-20030406-branchcvs2svn3-32/+39
'kettenis_i386newframe-20030406-branch'. Sprout from cagney_frameaddr-20030403-branch 2003-04-02 16:55:27 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-04 08:15:15 UTC Svein Seldal <Svein.Seldal@solidas.com> 'Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update': include/ChangeLog include/coff/tic4x.h include/opcode/tic4x.h
2003-04-02This commit was manufactured by cvs2svn to create branchcagney_frameaddr-20030403-branchpointcvs2svn11-2/+559
'cagney_frameaddr-20030403-branch'. Sprout from cagney_framebase-20030326-branch 2003-03-25 20:56:02 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-02 16:55:26 UTC Bob Wilson <bob.wilson@acm.org> ' * xtensa-config.h: Remove comment indicating that this is a': include/ChangeLog include/dis-asm.h include/elf/ChangeLog include/elf/arm.h include/elf/common.h include/elf/xtensa.h include/gdb/ChangeLog include/gdb/sim-arm.h include/xtensa-config.h include/xtensa-isa-internal.h include/xtensa-isa.h
2003-03-25This commit was manufactured by cvs2svn to create branchcagney_framebase-20030326-branchpointcvs2svn11-8/+106
'cagney_framebase-20030326-branch'. Sprout from cagney_lazyid-20030317-branch 2003-03-17 10:34:30 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-03-25 20:56:01 UTC Nick Clifton <nickc@redhat.com> 'Add iWMMXt support': include/ChangeLog include/ansidecl.h include/coff/ChangeLog include/coff/arm.h include/elf/ChangeLog include/elf/arm.h include/gdb/ChangeLog include/gdb/sim-arm.h include/hashtab.h include/opcode/ChangeLog include/opcode/s390.h
2003-03-17This commit was manufactured by cvs2svn to create branchcagney_lazyid-20030317-branchpointgithub/cagney_lazyid-20030317-branchcagney_lazyid-20030317-branchcvs2svn2-0/+7
'cagney_lazyid-20030317-branch'. Sprout from offbyone-20030313-branch 2003-03-12 20:47:08 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-03-17 10:34:29 UTC Nick Clifton <nickc@redhat.com> '(O_SYS_CMDLINE): New pseudo opcode for command line processing.': ChangeLog Makefile.in Makefile.tpl include/opcode/ChangeLog include/opcode/h8300.h
2003-03-06This commit was manufactured by cvs2svn to create branch 'kettenis-kettenis-i386newframe-20030308-branchpointcvs2svn4-129/+142
i386newframe-20030308-branch'. Sprout from cagney_offbyone-20030303-branch 2003-02-28 18:03:32 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-03-06 20:50:01 UTC Andrew Cagney <cagney@gnu.org> '2003-03-06 Andrew Cagney <cagney@redhat.com>': ChangeLog Makefile.in Makefile.tpl config/ChangeLog configure configure.in include/aout/ChangeLog include/aout/aout64.h include/elf/ChangeLog include/elf/sh.h texinfo/texinfo.tex Delete: config/mh-dgux
2003-02-28This commit was manufactured by cvs2svn to create branchcagney_offbyone-20030303-branchpointgithub/cagney_offbyone-20030303-branchcagney_offbyone-20030303-branchcvs2svn11-221/+346
'cagney_offbyone-20030303-branch'. Sprout from interps-20030202-branch 2003-01-31 21:24:33 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-02-28 18:03:31 UTC Nathanael Nerode <neroden@gcc.gnu.org> ' * Makefile.tpl: Rearrange.': ChangeLog Makefile.def Makefile.in Makefile.tpl config.guess config.sub configure configure.in include/ChangeLog include/elf/ChangeLog include/elf/arm.h include/elf/ia64.h include/elf/ppc.h include/elf/ppc64.h include/gdb/ChangeLog include/gdb/remote-sim.h include/libiberty.h include/opcode/ChangeLog include/opcode/h8300.h libtool.m4 ltcf-cxx.sh ltcf-gcj.sh ltconfig
2003-01-31This commit was manufactured by cvs2svn to create branchinterps-20030202-branchpointgithub/interps-20030202-branchinterps-20030202-branchcvs2svn16-325/+504
'interps-20030202-branch'. Sprout from cagney-unwind-20030108-branch 2003-01-09 20:50:26 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'cagney-' Cherrypick from master 2003-01-31 21:24:32 UTC John David Anglin <dave.anglin@nrc-cnrc.gc.ca> ' * hppa.h (ldwa, ldda): Add ordered opcodes.': ChangeLog Makefile.in Makefile.tpl config.if configure configure.in include/ChangeLog include/coff/ti.h include/coff/tic4x.h include/elf/ChangeLog include/elf/common.h include/elf/mips.h include/elf/ppc.h include/elf/ppc64.h include/elf/s390.h include/elf/sh.h include/elf/sparc.h include/hashtab.h include/opcode/ChangeLog include/opcode/hppa.h include/opcode/m68hc11.h include/splay-tree.h
2003-01-082003-01-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-9/+16
* mips.h: Fix missing space in comment. (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5) (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right by four bits.
2003-01-03 * dis-asm.h (print_insn_iq2000): Declare.Stan Cox5-0/+70
* common.h (EM_IQ2000): Define. * iq2000.h: New file.
2003-01-02[ gas/ChangeLog ]Chris Demetriou2-6/+15
2003-01-02 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c: Update copyright years to include 2003. (mips_ip): Fix indentation of "+A", "+B", and "+C" handling. Additionally, clean up their code slightly and clean up their comments some more. * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation. [ gas/testsuite/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * gas/mips/elf_arch_mips32r2.d: Fix file description comment. [ include/opcode/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * mips.h: Update copyright years to include 2002 (which had been missed previously) and 2003. Make comments about "+A", "+B", and "+C" operand types more descriptive.
2002-12-31[ gas/ChangeLog ]Chris Demetriou2-1/+7
2002-12-31 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (validate_mips_insn, mips_ip): Recognize the "+D" operand, which will be used only by the disassembler. [ gas/testsuite/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32r2.d: New test. * gas/mips/cp0sel-names-mips64.d: New test. * gas/mips/cp0sel-names-numeric.d: New test. * gas/mips/cp0sel-names-sb1.d: New test. * gas/mips/cp0sel-names.s: New test source file. * gas/mips/mips.exp: Run new tests. [ include/opcode/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips.h: Note that the "+D" operand type name is now used. [ opcodes/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0sel_name): New structure. (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2) (mips_cp0sel_names_sb1): New arrays. (mips_arch_choice): New structure members "cp0sel_names" and "cp0sel_names_len". (mips_arch_choices): Add references to new cp0sel_names arrays as appropriate, and make all existing entries reference appropriate mips_XXX_names_numeric arrays rather than simply using NULL. (mips_cp0sel_names, mips_cp0sel_names_len): New variables. (lookup_mips_cp0sel_name): New function. (set_default_mips_dis_options): Set mips_cp0sel_names and mips_cp0sel_names_len as appropriate. Remove now-unnecessary checks for NULL register name arrays. (parse_mips_dis_option): Likewise. (print_insn_arg): Handle "+D" operand type. * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register names symbolically.
2002-12-31[ bfd/ChangeLog ]Chris Demetriou4-2/+37
2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-30Add support for msp430.Nick Clifton7-0/+187
2002-12-30Added some more pseudo opcodes for system call processing.Nick Clifton2-0/+15
2002-12-27[ binutils/ChangeLog ]Chris Demetriou4-0/+29
2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-26 * sim-h8300.h: Remove ^M.Kazu Hirata2-33/+37
2002-12-23 * bfdlink.h (struct bfd_link_info): Add "strip_discarded".Alan Modra2-0/+7
2002-12-20* xstormy16.h: Add XSTORMY16_12.DJ Delorie2-1/+6
2002-12-19 * bfdlink.h (struct bfd_link_info): Replace bfd_boolean fields withAlan Modra2-66/+71
bit-fields. Rearrange to put all like types together.
2002-12-17* xstormy16.h (START_RELOC_NUMBERS) Add relocation numbersDJ Delorie2-0/+8
for R_XSTORMY16_LO16 and R_XSTORMY16_HI16.
2002-12-16 * hppa.h (completer_chars): #if 0 out.Alan Modra2-1/+5
2002-12-16 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" andAlan Modra2-17/+22
"default_args". (struct not_wot): Constify "args". (struct not): Constify "name". (numopcodes): Delete. (endop): Delete.
2002-12-12 * pj.h (pj_opc_info_t): Add union.Alan Modra2-2/+9
* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change. * config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype. (c_to_r, ipush_code, fake_opcode, alias): Likewise. (fake_opcode): Adjust for pj_opc_int_t change. (md_begin): Likewise. (md_assemble): Likewise. (ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc instead of non-existent third arg of parse_exp_save_ilp. (md_parse_option): Correct "little" and "big" calls.
2002-12-10Add support for displaying extension to DWARF2 used by Unified Parallel CNick Clifton2-6/+20
compiler.
2002-12-05Patch to update IA-64 port to SDM 2.1.Jim Wilson2-6/+11
bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-03include/opcode/Richard Henderson2-0/+5
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV. bfd/ * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry. opcodes/ * ia64-opc-m.c: Add ld8.mov. * ia64-asmtab.c: Regenerate. gas/ * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case. gas/testsuite/ * gas/ia64/ldxmov-1.[ds]: New. * gas/ia64/ldxmov-2.[ls]: New. * gas/ia64/ia64.exp: Run them.
2002-12-02 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.Alan Modra2-3/+10
Constify "leaf" and "multi".
2002-12-01 * m68hc11.h (EF_M68HC12_MACH, EF_M68HCS12_MACH): Define.Stephane Carrez2-0/+24
(EF_M68HC11_MACH_MASK, EF_M68HC11_MACH): Define. (EF_M68HC11_MERGE_MACH, EF_M68HC11_CAN_MERGE_MACH): Define.
2002-11-30s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. SimplifyAlan Modra8-129/+127
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-28include/elf/ChangeLogAlan Modra2-67/+23
* internal.h (elf32_internal_ehdr, Elf32_Internal_Ehdr, elf64_internal_ehdr, Elf64_Internal_Ehdr, elf32_internal_phdr, Elf32_Internal_Phdr, elf64_internal_phdr, Elf64_Internal_Phdr, elf32_internal_shdr, Elf32_Internal_Shdr, elf64_internal_shdr, Elf64_Internal_Shdr, elf32_internal_sym, elf64_internal_sym, Elf32_Internal_Sym, Elf64_Internal_Sym, Elf32_Internal_Note, elf32_internal_note, elf32_internal_rel, Elf32_Internal_Rel, elf64_internal_rel, Elf64_Internal_Rel, elf32_internal_rela, elf64_internal_rela, Elf32_Internal_Rela, Elf64_Internal_Rela, elf32_internal_dyn, elf64_internal_dyn, Elf32_Internal_Dyn, Elf64_Internal_Dyn, elf32_internal_verdef, elf64_internal_verdef, elf32_internal_verdaux, elf64_internal_verdaux, elf32_internal_verneed, elf64_internal_verneed, elf32_internal_vernaux, elf64_internal_vernaux, elf32_internal_versym, elf64_internal_versym, Elf32_Internal_Verdef, Elf64_Internal_Verdef, Elf32_Internal_Verdaux, Elf64_Internal_Verdaux, Elf32_Internal_Verneed, Elf64_Internal_Verneed, Elf32_Internal_Vernaux, Elf64_Internal_Vernaux, Elf32_Internal_Versym, Elf64_Internal_Versym, Elf32_Internal_Syminfo, Elf64_Internal_Syminfo): Delete. (Elf_Internal_Rel): Delete. bfd/ChangeLog * elf-bfd.h: Replace occurrences of Elf32_Internal_* and Elf64_Internal_* with Elf_Internal_*. Replace Elf_Internal_Rel with Elf_Internal_Rela. * elf-hppa.h, elf-m10200.c, elf-m10300.c, elf32-arc.c, elf32-arm.h, elf32-avr.c, elf32-cris.c, elf32-d10v.c, elf32-d30v.c, elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-gen.c, elf32-h8300.c, elf32-hppa.c, elf32-i370.c, elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c, elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c, elf32-m68k.c, elf32-mcore.c, elf32-mips.c, elf32-openrisc.c, elf32-or32.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-v850.c, elf32-vax.c, elf32-xstormy16.c, elf64-alpha.c, elf64-gen.c, elf64-hppa.c, elf64-mips.c, elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c, elfarm-nabi.c, elfarm-oabi.c, elfcode.h, elflink.h, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c: Ditto. * elf-hppa.h (elf_hppa_internal_shdr): Delete. Use Elf_Internal_Shdr throughout instead. * elf.c (_bfd_elf_no_info_to_howto_rel): Delete. * elfcode.h (elf_swap_reloca_in): Pass source operand as a bfd_byte *. Remove INLINE keyword. (elf_swap_reloc_in): Likewise. Also clear r_addend. (elf_swap_reloc_out, elf_swap_reloca_out): Pass destination operand as a bfd_byte *. (elf_write_relocs): Consolidate REL and RELA code. (elf_slurp_reloc_table_from_section): Simplify REL code. (NAME(_bfd_elf,size_info)): Populate reloc swap entries. * elf-bfd.h (MAX_INT_RELS_PER_EXT_REL): Define. * elflink.h (elf_link_read_relocs_from_section): Consolidate REL and RELA code. (elf_link_adjust_relocs): Likewise. Don't malloc space for temp reloc array, use a fixed size of MAX_INT_RELS_PER_EXT_REL. (elf_link_output_relocs): Likewise. (elf_reloc_link_order): Likewise. (elf_finish_pointer_linker_section): Likewise. (struct elf_link_sort_rela): Remove union. (elf_link_sort_cmp1): Update to suit. (elf_link_sort_cmp2): Here too. (elf_link_sort_relocs): Consolidate REL and RELA code. Fix memory over-allocation for int_rels_per_ext_rel != 1 case. * elf32-arm.h: Update all bfd_elf32_swap_reloc_out calls. * elf32-i386.c: Likewise. * elf32-cris.c: Likewise for bfd_elf32_swap_reloca_out. * elf32-hppa.c, elf32-i370.c, elf32-m68k.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-vax.c, elfxx-mips.c: Likewise. * elf64-alpha.c: Likewise for bfd_elf64_swap_reloca_out. * elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c: Likewise. * elfxx-ia64.c: Likewise for bfd_elfNN_swap_reloca_out. * elfxx-mips.c (sort_dynamic_relocs): Likewise for bfd_elf32_swap_reloc_in. * elf32-arm.h: Update elf32_arm_info_to_howto calls. * elf32-mips.c: Likewise for mips_info_to_howto_rel. (mips_elf64_swap_reloc_in): Zero r_addend. (mips_elf64_be_swap_reloc_in): Likewise. (mips_elf64_slurp_one_reloc_table): Simplify. * elf64-alpha.c (alpha_elf_size_info): Populate reloc swap entries. * elf64-hppa.c (hppa64_elf_size_info): Likewise. * elf64-sparc.c (sparc64_elf_size_info): Likewise.
2002-11-24* libiberty.h (basename): Add NetBSD to the list.Jason Thorpe2-1/+5
2002-11-22merge from gccDJ Delorie2-0/+10
2002-11-192002-11-19 Klee Dienes <kdienes@apple.com>Klee Dienes2-22/+26
* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size' fields. (h8_opcodes). Modify initializer and initializer macros to no longer initialize the removed fields.
2002-11-19Fixed LDHI constraintSvein Seldal2-2/+6
2002-11-182002-11-11 Klee Dienes <kdienes@apple.com>Klee Dienes2-22/+28
* h8300.h (h8_opcode): Remove 'length' field. (h8_opcodes): Mark as 'const' (both the declaration and definition). Modify initializer and initializer macros to no longer initialize the length field. 2002-11-11 Klee Dienes <kdienes@apple.com> * h8300-dis.c: Include libiberty.h (for xmalloc). (struct h8_instruction): New type, used to wrap h8_opcodes with a length field (computed at run-time). (h8_instructions): New variable. (bfd_h8_disassemble_init): Allocate the storage for h8_instructions. Fill h8_instructions with pointers to the appropriate opcode and the correct value for the length field. (bfd_h8_disassemble): Iterate through h8_instructions instead of h8_opcodes.
2002-11-182002-11-18 Klee Dienes <kdienes@apple.com>Klee Dienes3-3/+11
* arc.h (arc_ext_opcodes): Declare as extern. (arc_ext_operands): Declare as extern. * i860.h (i860_opcodes): Declare as const. 2002-11-18 Klee Dienes <kdienes@apple.com> * arc-opc.c (arc_ext_opcodes): Define. (arc_ext_operands): Define. * i386-dis.c (Suffix3DNow): Declare as const. * arm-opc.h (arm_opcodes): Declare as const. (thumb_opcodes): Declare as const. * h8500-opc.h (h8500_table): Declare as const. (h8500_table): Use a NULL for the opcode in the terminator, so that code testing (opcode->name) behaves correctly. * mcore-opc.h (mcore_table): Declare as const. * sh-opc.h (sh_table): Declare as const. * w65-opc.h (optable): Declare as const. * z8k-opc.h (z8k_table): Declare as const.
2002-11-18Fixups in ChangeLog entries which has been filed in the wrong place.Svein Seldal2-14/+14
2002-11-18 * gas/config/tc-tic4x.c: Fixed proper commandlineSvein Seldal2-375/+369
parameters. Added support for new opcode-list format. General error message fixups. (c4x_inst_add): Reject insn not for our CPU (md_begin): Added matrix for setting the proper opcode-level & device-flags according to cpu type and revision. Rewrite the opcode hasher. (c4x_operand_parse): Fix opcode bug (c4x_operands_match): New function argument. Added dry-run mechanism, that is optional error generation. Added constraint 'i' and 'j'. (c4x_insn_check): Added new function for post-verification of the generated insn. (md_assemble): Check all opcodes before croaking because of an argument mismatch. Need this to be able to fully support ortogonally arguments. (md_parse_options): Revised commandprompt swicthes and added new ones. (md_show_usage): Complete rewrite of printout. * gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn * gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter * gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter * gas/testsuite/gas/tic4x/allopcodes.S: Add support for new opclass.h changes * gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for the new enhanced opcodes. * gas/testsuite/gas/tic4x/opcodes.s: Regenerate * gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for the enhanced and special insns. * gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite * include/opcode/tic4x.h: File reordering. Added enhanced opcodes. * opcodes/tic4x-dis.c: Added support for enhanced and special insn. (c4x_print_op): Added insn class 'i' and 'j' (c4x_hash_opcode_special): Add to support special insn (c4x_hash_opcode): Update to support the new opcode-list format. Add support for the new special insns. (c4x_disassemble): New opcode-list support.
2002-11-162002-11-16 Klee Dienes <kdienes@apple.com>Klee Dienes2-485/+7
* opcode/m88k.h (INSTAB): Remove 'next' field. (instruction): Remove definition; replace with extern declaration and mark as const. W
2002-11-16 * gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.Svein Seldal2-1077/+827
(c4x_operands_match): Added check for 8-bits LDF insn. Give warning when using constant direct bigger than 2^16. Add the new arguments. * include/opcode/tic4x.h: Major rewrite of entire file. Define instruction classes, and put each instruction into a class. * opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new argument format. Fix bug in 'N' register printer.
2002-11-14Add --enable-auto-import extension.Nick Clifton2-0/+10
2002-11-11 gas tic4x target enhancements (long list - see gas/ChangeLog andSvein Seldal2-5/+16
include/ChangeLog)
2002-10-27merge from gccDJ Delorie3-2/+10
2002-10-27merge from gccDJ Delorie2-0/+8
2002-10-25merge from gccDJ Delorie2-1/+10
2002-10-16merge from gccDJ Delorie2-1/+5
2002-10-14 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.Alan Modra2-8/+12
2002-10-11 * sh.h: Add SH TLS relocs.Kaz Kojima2-3/+17
generated by cgit v1.1 at 2024-11-16 03:36:48 +0000