diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 19 | ||||
| -rw-r--r-- | include/opcode/mips.h | 99 |
2 files changed, 28 insertions, 90 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 62661e2..4d57384 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,5 +1,24 @@ 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips.h (M_ACLR_OB, M_ASET_OB, M_CACHE_OB, M_CACHEE_OB, M_L_DOB) + (M_LB_A, M_LBE_OB, M_LBU_A, M_LBUE_OB, M_LD_A, M_LD_OB, M_LDC2_OB) + (M_LDL_OB, M_LDM_OB, M_LDP_OB, M_LDR_OB, M_LH_A, M_LHE_OB, M_LHU_A) + (M_LHUE_OB, M_LL_OB, M_LLD_OB, M_LLE_OB, M_LS_A, M_LW_A, M_LWE_OB) + (M_LWC0_A, M_LWC1_A, M_LWC2_A, M_LWC2_OB, M_LWC3_A, M_LWL_A, M_LWL_OB) + (M_LWLE_OB, M_LWM_OB, M_LWP_OB, M_LWR_A, M_LWR_OB, M_LWRE_OB, M_LWU_OB) + (M_PREF_OB, M_PREFE_OB, M_S_DOB, M_SAA_OB, M_SAAD_OB, M_SC_OB) + (M_SCD_OB, M_SCE_OB, M_SD_A, M_SD_OB, M_SDC2_OB, M_SDL_OB, M_SDM_OB) + (M_SDP_OB, M_SDR_OB, M_SB_A, M_SBE_OB, M_SH_A, M_SHE_OB, M_SW_A) + (M_SWE_OB, M_SWC0_A, M_SWC1_A, M_SWC2_A, M_SWC2_OB, M_SWC3_A, M_SWL_A) + (M_SWL_OB, M_SWLE_OB, M_SWM_OB, M_SWP_OB, M_SWR_A, M_SWR_OB, M_SWRE_OB) + (M_ULD, M_ULH, M_ULHU, M_ULW, M_USH, M_USW, M_USD): Delete. + (M_ULD_A, M_ULH_A, M_ULHU_A, M_ULW_A, M_USH_A, M_USW_A, M_USD_A): + Rename to... + (M_ULD_AB, M_ULH_AB, M_ULHU_AB, M_ULW_AB, M_USH_AB, M_USW_AB) + (M_USD_AB): ...these. + +2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips.h: Remove documentation of "[" and "]". Update documentation of "k" and the MDMX formats. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index f70a500..89ea3e9 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -947,8 +947,8 @@ opcode_is_member (const struct mips_opcode *insn, int isa, int ase, int cpu) /* This is a list of macro expanded instructions. _I appended means immediate - _A appended means address - _AB appended means address with base register + _A appended means target address of a jump + _AB appended means address with (possibly zero) base register _D appended means 64 bit floating point constant _S appended means 32 bit floating point constant. */ @@ -956,12 +956,10 @@ enum { M_ABS, M_ACLR_AB, - M_ACLR_OB, M_ADD_I, M_ADDU_I, M_AND_I, M_ASET_AB, - M_ASET_OB, M_BALIGN, M_BC1FL, M_BC1TL, @@ -1018,9 +1016,7 @@ enum M_BNE_I, M_BNEL_I, M_CACHE_AB, - M_CACHE_OB, M_CACHEE_AB, - M_CACHEE_OB, M_DABS, M_DADD_I, M_DADDU_I, @@ -1059,41 +1055,25 @@ enum M_JALS_A, M_JRADDIUSP, M_JRC, - M_L_DOB, M_L_DAB, M_LA_AB, - M_LB_A, M_LB_AB, - M_LBE_OB, M_LBE_AB, - M_LBU_A, M_LBU_AB, - M_LBUE_OB, M_LBUE_AB, M_LCA_AB, - M_LD_A, - M_LD_OB, M_LD_AB, M_LDC1_AB, M_LDC2_AB, - M_LDC2_OB, M_LQC2_AB, M_LDC3_AB, M_LDL_AB, - M_LDL_OB, M_LDM_AB, - M_LDM_OB, M_LDP_AB, - M_LDP_OB, M_LDR_AB, - M_LDR_OB, - M_LH_A, M_LH_AB, - M_LHE_OB, M_LHE_AB, - M_LHU_A, M_LHU_AB, - M_LHUE_OB, M_LHUE_AB, M_LI, M_LI_D, @@ -1101,42 +1081,22 @@ enum M_LI_S, M_LI_SS, M_LL_AB, - M_LL_OB, M_LLD_AB, - M_LLD_OB, M_LLE_AB, - M_LLE_OB, M_LQ_AB, - M_LS_A, - M_LW_A, M_LW_AB, - M_LWE_OB, M_LWE_AB, - M_LWC0_A, M_LWC0_AB, - M_LWC1_A, M_LWC1_AB, - M_LWC2_A, M_LWC2_AB, - M_LWC2_OB, - M_LWC3_A, M_LWC3_AB, - M_LWL_A, M_LWL_AB, - M_LWL_OB, M_LWLE_AB, - M_LWLE_OB, M_LWM_AB, - M_LWM_OB, M_LWP_AB, - M_LWP_OB, - M_LWR_A, M_LWR_AB, - M_LWR_OB, M_LWRE_AB, - M_LWRE_OB, M_LWU_AB, - M_LWU_OB, M_MSGSND, M_MSGLD, M_MSGLD_T, @@ -1153,9 +1113,7 @@ enum M_NOR_I, M_OR_I, M_PREF_AB, - M_PREF_OB, M_PREFE_AB, - M_PREFE_OB, M_REM_3, M_REM_3I, M_REMU_3, @@ -1169,35 +1127,22 @@ enum M_DROR_I, M_ROR_I, M_S_DA, - M_S_DOB, M_S_DAB, M_S_S, M_SAA_AB, - M_SAA_OB, M_SAAD_AB, - M_SAAD_OB, M_SC_AB, - M_SC_OB, M_SCD_AB, - M_SCD_OB, M_SCE_AB, - M_SCE_OB, - M_SD_A, - M_SD_OB, M_SD_AB, M_SDC1_AB, M_SDC2_AB, - M_SDC2_OB, M_SQC2_AB, M_SDC3_AB, M_SDL_AB, - M_SDL_OB, M_SDM_AB, - M_SDM_OB, M_SDP_AB, - M_SDP_OB, M_SDR_AB, - M_SDR_OB, M_SEQ, M_SEQ_I, M_SGE, @@ -1216,42 +1161,23 @@ enum M_SLTU_I, M_SNE, M_SNE_I, - M_SB_A, M_SB_AB, - M_SBE_OB, M_SBE_AB, - M_SH_A, M_SH_AB, - M_SHE_OB, M_SHE_AB, M_SQ_AB, - M_SW_A, M_SW_AB, - M_SWE_OB, M_SWE_AB, - M_SWC0_A, M_SWC0_AB, - M_SWC1_A, M_SWC1_AB, - M_SWC2_A, M_SWC2_AB, - M_SWC2_OB, - M_SWC3_A, M_SWC3_AB, - M_SWL_A, M_SWL_AB, - M_SWL_OB, M_SWLE_AB, - M_SWLE_OB, M_SWM_AB, - M_SWM_OB, M_SWP_AB, - M_SWP_OB, - M_SWR_A, M_SWR_AB, - M_SWR_OB, M_SWRE_AB, - M_SWRE_OB, M_SUB_I, M_SUBU_I, M_SUBU_I_2, @@ -1263,20 +1189,13 @@ enum M_TNE_I, M_TRUNCWD, M_TRUNCWS, - M_ULD, - M_ULD_A, - M_ULH, - M_ULH_A, - M_ULHU, - M_ULHU_A, - M_ULW, - M_ULW_A, - M_USH, - M_USH_A, - M_USW, - M_USW_A, - M_USD, - M_USD_A, + M_ULD_AB, + M_ULH_AB, + M_ULHU_AB, + M_ULW_AB, + M_USH_AB, + M_USW_AB, + M_USD_AB, M_XOR_I, M_COP0, M_COP1, |