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author | Jeff Johnston <jjohnstn@redhat.com> | 2021-11-29 17:33:52 -0500 |
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committer | Jeff Johnston <jjohnstn@redhat.com> | 2021-11-30 11:23:39 -0500 |
commit | 8fa73a9f8414a4926365324c2fe32a237c2eb91d (patch) | |
tree | fc5bb4225bac3eb730cdfe730066c490d2886ffa /ltoptions.m4 | |
parent | 3edea7cd55d178164a649d9eea252c807ed2c038 (diff) | |
download | newlib-8fa73a9f8414a4926365324c2fe32a237c2eb91d.zip newlib-8fa73a9f8414a4926365324c2fe32a237c2eb91d.tar.gz newlib-8fa73a9f8414a4926365324c2fe32a237c2eb91d.tar.bz2 |
Modifying patch from: marian.buschsieweke@ovgu.de
The code accessing the floating point control/status register, namely
#define __cfc1(__fcsr) __asm __volatile("cfc1 %0, $31" : "=r" (__fcsr)
does not compile with mips16. This changed the makefile to pass -mno-mips16 to avoid the following
compiler error:
mips-mti-elf fails with "Error: unrecognized opcode `cfc1 $3,$31'"
Diffstat (limited to 'ltoptions.m4')
0 files changed, 0 insertions, 0 deletions