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authorAlan Modra <modra@gmail.com>2002-07-08 10:03:11 +0000
committerAlan Modra <modra@gmail.com>2002-07-08 10:03:11 +0000
commit23c3a85872597c87dfeeb37f6ef42dab25406951 (patch)
tree31b15a2f1536cac6eb4e79185105b979361d7721 /include
parentaeb6d1c36e3e5bed3d01a82a69f4d139ca067a01 (diff)
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gas/ChangeLog
* config/tc-i386.c (process_suffix): Remove intel mode movsx and movzx fudges. (md_assemble): Instead, zap the suffix here. include/opcode/ChangeLog * i386.h: Remove IgnoreSize from movsx and movzx.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/i386.h8
2 files changed, 8 insertions, 4 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 1d4c54a..f771d86 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2002-07-08 Alan Modra <amodra@bigpond.net.au>
+
+ * i386.h: Remove IgnoreSize from movsx and movzx.
+
2002-06-08 Alan Modra <amodra@bigpond.net.au>
* a29k.h: Replace CONST with const.
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 0171f62..71c204c 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -121,9 +121,9 @@ static const template i386_optab[] = {
{"movslq", 2, 0x63, X, Cpu64, NoSuf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} },
/* Intel Syntax next 5 insns */
{"movsx", 2, 0x0fbe, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} },
-{"movsx", 2, 0x0fbf, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} },
+{"movsx", 2, 0x0fbf, X, Cpu386, w_Suf|Modrm, { Reg16|ShortMem, Reg32, 0} },
{"movsx", 2, 0x0fbe, X, Cpu64, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} },
-{"movsx", 2, 0x0fbf, X, Cpu64, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} },
+{"movsx", 2, 0x0fbf, X, Cpu64, w_Suf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} },
{"movsx", 2, 0x63, X, Cpu64, l_Suf|Modrm|Rex64, { Reg32|WordMem, Reg64, 0} },
/* Move with zero extend. */
@@ -135,11 +135,11 @@ static const template i386_optab[] = {
{"movzwq", 2, 0x0fb7, X, Cpu64, NoSuf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} },
/* Intel Syntax next 4 insns */
{"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} },
-{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} },
+{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm, { Reg16|ShortMem, Reg32, 0} },
/* These instructions are not particulary usefull, since the zero extend
32->64 is implicit, but we can encode them. */
{"movzx", 2, 0x0fb6, X, Cpu386, b_Suf|Modrm|Rex64, { Reg8|ByteMem, Reg64, 0} },
-{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|IgnoreSize|Rex64, { Reg16|ShortMem, Reg64, 0} },
+{"movzx", 2, 0x0fb7, X, Cpu386, w_Suf|Modrm|Rex64, { Reg16|ShortMem, Reg64, 0} },
/* Push instructions. */
{"push", 1, 0x50, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } },