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authorChao-ying Fu <Chao-ying.Fu@imgtec.com>2005-08-25 18:09:24 +0000
committerChao-ying Fu <Chao-ying.Fu@imgtec.com>2005-08-25 18:09:24 +0000
commit4a8b3ef6929fc2387ebdd07b5c53f92db463d46b (patch)
tree90ce53d045ef3dce3e2770816f9f944c6e320bd8 /include
parentb4b0980b9d833ee7e2bd84a9b5db573f7dab9eec (diff)
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* mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7, OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4, OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP, OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define. Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP instructions. (INSN_DSP): New define for DSP ASE.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog11
-rw-r--r--include/opcode/mips.h40
2 files changed, 50 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 4a41461..8226cb9 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,14 @@
+2005-08-25 Chao-ying Fu <fu@mips.com>
+
+ * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
+ OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
+ OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
+ OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
+ OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
+ Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
+ instructions.
+ (INSN_DSP): New define for DSP ASE.
+
2005-08-18 Alan Modra <amodra@bigpond.net.au>
* a29k.h: Delete.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 44b9a15..6267f82 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -148,6 +148,28 @@ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, US
#define OP_MASK_EXTMSBD 0x1f /* "ext" MSBD. */
#define OP_SH_EXTMSBD 11
+/* MIPS DSP ASE */
+#define OP_SH_DSPACC 11
+#define OP_MASK_DSPACC 0x3
+#define OP_SH_DSPACC_S 21
+#define OP_MASK_DSPACC_S 0x3
+#define OP_SH_DSPSFT 20
+#define OP_MASK_DSPSFT 0x3f
+#define OP_SH_DSPSFT_7 19
+#define OP_MASK_DSPSFT_7 0x7f
+#define OP_SH_SA3 21
+#define OP_MASK_SA3 0x7
+#define OP_SH_SA4 21
+#define OP_MASK_SA4 0xf
+#define OP_SH_IMM8 16
+#define OP_MASK_IMM8 0xff
+#define OP_SH_IMM10 16
+#define OP_MASK_IMM10 0x3ff
+#define OP_SH_WRDSP 11
+#define OP_MASK_WRDSP 0x3f
+#define OP_SH_RDDSP 16
+#define OP_MASK_RDDSP 0x3f
+
#define OP_OP_COP0 0x10
#define OP_OP_COP1 0x11
#define OP_OP_COP2 0x12
@@ -296,6 +318,19 @@ struct mips_opcode
"Y" MDMX source register (OP_*_FS)
"Z" MDMX source register (OP_*_FT)
+ DSP ASE usage:
+ "3" 3 bit unsigned immediate (OP_*_SA3)
+ "4" 4 bit unsigned immediate (OP_*_SA4)
+ "5" 8 bit unsigned immediate (OP_*_IMM8)
+ "6" 5 bit unsigned immediate (OP_*_RS)
+ "7" 2 bit dsp accumulator register (OP_*_DSPACC)
+ "8" 6 bit unsigned immediate (OP_*_WRDSP)
+ "9" 2 bit dsp accumulator register (OP_*_DSPACC_S)
+ "0" 6 bit signed immediate (OP_*_DSPSFT)
+ ":" 7 bit signed immediate (OP_*_DSPSFT_7)
+ "'" 6 bit unsigned immediate (OP_*_RDDSP)
+ "@" 10 bit signed immediate (OP_*_IMM10)
+
Other:
"()" parens surrounding optional value
"," separates operands
@@ -303,7 +338,8 @@ struct mips_opcode
"+" Start of extension sequence.
Characters used so far, for quick reference when adding more:
- "%[]<>(),+"
+ "34567890"
+ "%[]<>(),+:'@"
"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
"abcdefhijklopqrstuvwxz"
@@ -413,6 +449,8 @@ struct mips_opcode
/* Masks used for MIPS-defined ASEs. */
#define INSN_ASE_MASK 0x0000f000
+/* DSP ASE */
+#define INSN_DSP 0x00001000
/* MIPS 16 ASE */
#define INSN_MIPS16 0x00002000
/* MIPS-3D ASE */