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| author | cvs2svn <> | 2005-10-31 18:01:17 +0000 |
|---|---|---|
| committer | cvs2svn <> | 2005-10-31 18:01:17 +0000 |
| commit | 45234329c6fc8893ec04a6166c2a1d733370d549 (patch) | |
| tree | 7bfd5d295bd7ce04c5f2bdf963913ecd1d5d7615 /include/opcode | |
| parent | 280271aaa4a71aa61b657f4d8c5990bce482a3da (diff) | |
| download | newlib-github/gdb_6_4-branch.zip newlib-github/gdb_6_4-branch.tar.gz newlib-github/gdb_6_4-branch.tar.bz2 | |
This commit was manufactured by cvs2svn to create branch 'gdb_6_4-branch'.gdb_6_4-20051202-releasegdb_6_4-2005-11-01-branchpointgithub/gdb_6_4-branchgdb_6_4-branch
Sprout from gdb-csl-arm-20051020-branch 2005-10-17 12:54:35 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'gdb-csl-'
Cherrypick from master 2005-10-31 18:01:16 UTC DJ Delorie <dj@redhat.com> 'merge from gcc':
ChangeLog
Makefile.def
Makefile.in
Makefile.tpl
depcomp
etc/ChangeLog
etc/texi2pod.pl
include/ChangeLog
include/coff/ChangeLog
include/coff/internal.h
include/coff/z80.h
include/dis-asm.h
include/elf/ChangeLog
include/floatformat.h
include/opcode/ChangeLog
include/opcode/cgen-bitset.h
include/opcode/cgen.h
include/opcode/ia64.h
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 40 | ||||
| -rw-r--r-- | include/opcode/cgen-bitset.h | 55 | ||||
| -rw-r--r-- | include/opcode/cgen.h | 26 | ||||
| -rw-r--r-- | include/opcode/ia64.h | 4 |
4 files changed, 117 insertions, 8 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 0802870..a282a62 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,43 @@ +2005-10-28 Dave Brolley <brolley@redhat.com> + + Contribute the following changes: + 2005-02-16 Dave Brolley <brolley@redhat.com> + + * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename + cgen_isa_mask_* to cgen_bitset_*. + * cgen.h: Likewise. + + 2003-10-21 Richard Sandiford <rsandifo@redhat.com> + + * cgen.h (CGEN_BITSET_ATTR_VALUE): Fix definition. + (CGEN_ATTR_ENTRY): Change "value" to type "unsigned". + (CGEN_CPU_TABLE): Make isas a ponter. + + 2003-09-29 Dave Brolley <brolley@redhat.com> + + * cgen.h (CGEN_ATTR_VALUE_BITSET_TYPE): New typedef. + (CGEN_ATTR_VALUE_ENUM_TYPE): Ditto. + (CGEN_ATTR_VALUE_TYPE): Use these new typedefs. + + 2002-12-13 Dave Brolley <brolley@redhat.com> + + * cgen.h (symcat.h): #include it. + (cgen-bitset.h): #include it. + (CGEN_ATTR_VALUE_TYPE): Now a union. + (CGEN_ATTR_VALUE): Reference macros generated in opcodes/<arch>-desc.h. + (CGEN_ATTR_ENTRY): 'value' now unsigned. + (cgen_cpu_desc): 'isas' now (CGEN_ISA_MASK*). + * cgen-bitset.h: New file. + +2005-09-30 Catherine Moore <clm@cm00re.com> + + * bfin.h: New file. + +2005-10-24 Jan Beulich <jbeulich@novell.com> + + * ia64.h (enum ia64_opnd): Move memory operand out of set of + indirect operands. + 2005-10-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes. diff --git a/include/opcode/cgen-bitset.h b/include/opcode/cgen-bitset.h new file mode 100644 index 0000000..1b6fbe3 --- /dev/null +++ b/include/opcode/cgen-bitset.h @@ -0,0 +1,55 @@ +/* Header file the type CGEN_BITSET. + +Copyright 2002, 2005 Free Software Foundation, Inc. + +This file is part of GDB, the GNU debugger, and the GNU Binutils. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#ifndef CGEN_BITSET_H +#define CGEN_BITSET_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* A bitmask represented as a string. + Each member of the set is represented as a bit + in the string. Bytes are indexed from left to right in the string and + bits from most significant to least within each byte. + + For example, the bit representing member number 6 is (set->bits[0] & 0x02). +*/ +typedef struct cgen_bitset +{ + unsigned length; + char *bits; +} CGEN_BITSET; + +extern CGEN_BITSET *cgen_bitset_create PARAMS ((unsigned)); +extern void cgen_bitset_init PARAMS ((CGEN_BITSET *, unsigned)); +extern void cgen_bitset_clear PARAMS ((CGEN_BITSET *)); +extern void cgen_bitset_add PARAMS ((CGEN_BITSET *, unsigned)); +extern void cgen_bitset_set PARAMS ((CGEN_BITSET *, unsigned)); +extern int cgen_bitset_compare PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); +extern void cgen_bitset_union PARAMS ((CGEN_BITSET *, CGEN_BITSET *, CGEN_BITSET *)); +extern int cgen_bitset_intersect_p PARAMS ((CGEN_BITSET *, CGEN_BITSET *)); +extern int cgen_bitset_contains PARAMS ((CGEN_BITSET *, unsigned)); +extern CGEN_BITSET *cgen_bitset_copy PARAMS ((CGEN_BITSET *)); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h index efebadb..e8fd5d3 100644 --- a/include/opcode/cgen.h +++ b/include/opcode/cgen.h @@ -22,6 +22,8 @@ with this program; if not, write to the Free Software Foundation, Inc., #ifndef CGEN_H #define CGEN_H +#include "symcat.h" +#include "cgen-bitset.h" /* ??? This file requires bfd.h but only to get bfd_vma. Seems like an awful lot to require just to get such a fundamental type. Perhaps the definition of bfd_vma can be moved outside of bfd.h. @@ -107,7 +109,13 @@ typedef struct cgen_cpu_desc *CGEN_CPU_DESC; /* Type of attribute values. */ -typedef int CGEN_ATTR_VALUE_TYPE; +typedef CGEN_BITSET CGEN_ATTR_VALUE_BITSET_TYPE; +typedef int CGEN_ATTR_VALUE_ENUM_TYPE; +typedef union +{ + CGEN_ATTR_VALUE_BITSET_TYPE bitset; + CGEN_ATTR_VALUE_ENUM_TYPE nonbitset; +} CGEN_ATTR_VALUE_TYPE; /* Struct to record attribute information. */ @@ -153,7 +161,9 @@ struct { unsigned int bool; \ #define CGEN_ATTR_VALUE(obj, attr_table, attr) \ ((unsigned int) (attr) < CGEN_ATTR_NBOOL_OFFSET \ ? ((CGEN_ATTR_BOOLS (attr_table) & CGEN_ATTR_MASK (attr)) != 0) \ - : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET])) + : ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].nonbitset)) +#define CGEN_BITSET_ATTR_VALUE(obj, attr_table, attr) \ + ((attr_table)->nonbool[(attr) - CGEN_ATTR_NBOOL_OFFSET].bitset) /* Attribute name/value tables. These are used to assist parsing of descriptions at run-time. */ @@ -161,7 +171,7 @@ struct { unsigned int bool; \ typedef struct { const char * name; - CGEN_ATTR_VALUE_TYPE value; + unsigned value; } CGEN_ATTR_ENTRY; /* For each domain (ifld,hw,operand,insn), list of attributes. */ @@ -965,6 +975,7 @@ typedef CGEN_ATTR_TYPE (CGEN_INSN_NBOOL_ATTRS) CGEN_INSN_ATTR_TYPE; typedef enum cgen_insn_attr { CGEN_INSN_ALIAS = 0 } CGEN_INSN_ATTR; +#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) ((attrs)->bool & (1 << CGEN_INSN_ALIAS)) #endif /* This struct defines each entry in the instruction table. */ @@ -1016,6 +1027,8 @@ typedef struct /* Return value of attribute ATTR in INSN. */ #define CGEN_INSN_ATTR_VALUE(insn, attr) \ CGEN_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr)) +#define CGEN_INSN_BITSET_ATTR_VALUE(insn, attr) \ + CGEN_BITSET_ATTR_VALUE ((insn), CGEN_INSN_ATTRS (insn), (attr)) } CGEN_IBASE; /* Return non-zero if INSN is the "invalid" insn marker. */ @@ -1179,10 +1192,9 @@ typedef struct cgen_cpu_desc /* Bitmap of selected machine(s) (a la BFD machine number). */ int machs; - /* Bitmap of selected isa(s). - ??? Simultaneous multiple isas might not make sense, but it's not (yet) - precluded. */ - int isas; + /* Bitmap of selected isa(s). */ + CGEN_BITSET *isas; +#define CGEN_CPU_ISAS(cd) ((cd)->isas) /* Current endian. */ enum cgen_endian endian; diff --git a/include/opcode/ia64.h b/include/opcode/ia64.h index 58553b3..164594b 100644 --- a/include/opcode/ia64.h +++ b/include/opcode/ia64.h @@ -75,13 +75,15 @@ enum ia64_opnd IA64_OPND_R3, /* third register # */ IA64_OPND_R3_2, /* third register # (limited to gr0-gr3) */ + /* memory operands: */ + IA64_OPND_MR3, /* memory at addr of third register # */ + /* indirect operands: */ IA64_OPND_CPUID_R3, /* cpuid[reg] */ IA64_OPND_DBR_R3, /* dbr[reg] */ IA64_OPND_DTR_R3, /* dtr[reg] */ IA64_OPND_ITR_R3, /* itr[reg] */ IA64_OPND_IBR_R3, /* ibr[reg] */ - IA64_OPND_MR3, /* memory at addr of third register # */ IA64_OPND_MSR_R3, /* msr[reg] */ IA64_OPND_PKR_R3, /* pkr[reg] */ IA64_OPND_PMC_R3, /* pmc[reg] */ |
