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| author | Maciej W. Rozycki <macro@codesourcery.com> | 2011-10-24 14:21:41 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@codesourcery.com> | 2011-10-24 14:21:41 +0000 |
| commit | fbb04f9910ae33de1bdd7ac751f86851fb3ad7de (patch) | |
| tree | 48eb1e1756b5626fdaedb2ce1cfce9e90f30635c /include/opcode/mips.h | |
| parent | 53e93974c8b3f68a5b6b657c8aff9462d62a24cd (diff) | |
| download | newlib-fbb04f9910ae33de1bdd7ac751f86851fb3ad7de.zip newlib-fbb04f9910ae33de1bdd7ac751f86851fb3ad7de.tar.gz newlib-fbb04f9910ae33de1bdd7ac751f86851fb3ad7de.tar.bz2 | |
* mips.h: Fix a typo in description.
Diffstat (limited to 'include/opcode/mips.h')
| -rw-r--r-- | include/opcode/mips.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/opcode/mips.h b/include/opcode/mips.h index e6703f8..a94860f 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1616,7 +1616,7 @@ extern const int bfd_mips16_num_opcodes; "c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE) "d" 5-bit destination register specifier (MICROMIPSOP_*_RD) "h" 5-bit PREFX hint (MICROMIPSOP_*_PREFX) - "i" 16 bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE) + "i" 16-bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE) "j" 16-bit signed immediate (MICROMIPSOP_*_DELTA) "k" 5-bit cache opcode in target register position (MICROMIPSOP_*_CACHE) "n" register list for 32-bit LWM/SWM instruction (MICROMIPSOP_*_RT) |