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author | Andrew Cagney <cagney@gnu.org> | 2003-03-30 16:35:25 +0000 |
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committer | Andrew Cagney <cagney@gnu.org> | 2003-03-30 16:35:25 +0000 |
commit | 77c1e8a702423393f7766496b47fd73d603b1abd (patch) | |
tree | c8fb850fc2eb0c40712b0c5e7de63066eb442221 | |
parent | 8ed0d1ced5ea081b1d3091e2c04b595c555f98b5 (diff) | |
download | newlib-github/cagney_framebase-20030326-branch.zip newlib-github/cagney_framebase-20030326-branch.tar.gz newlib-github/cagney_framebase-20030326-branch.tar.bz2 |
Merge with mainline.github/cagney_framebase-20030326-branchcagney_framebase-20030326-branch
-rw-r--r-- | include/gdb/ChangeLog | 4 | ||||
-rw-r--r-- | include/gdb/sim-arm.h | 34 |
2 files changed, 37 insertions, 1 deletions
diff --git a/include/gdb/ChangeLog b/include/gdb/ChangeLog index 97c2f44..9a216a0 100644 --- a/include/gdb/ChangeLog +++ b/include/gdb/ChangeLog @@ -1,3 +1,7 @@ +2003-03-27 Nick Clifton <nickc@redhat.com> + + * sim-arm.h (sim_arm_regs): Add iWMMXt registers. + 2003-03-20 Nick Clifton <nickc@redhat.com> * sim-arm.h (sim_arm_regs): Add Maverick co-processor diff --git a/include/gdb/sim-arm.h b/include/gdb/sim-arm.h index fae11f0..5598f73 100644 --- a/include/gdb/sim-arm.h +++ b/include/gdb/sim-arm.h @@ -72,7 +72,39 @@ enum sim_arm_regs SIM_ARM_MAVERIC_COP0R13_REGNUM, SIM_ARM_MAVERIC_COP0R14_REGNUM, SIM_ARM_MAVERIC_COP0R15_REGNUM, - SIM_ARM_MAVERIC_DSPSC_REGNUM + SIM_ARM_MAVERIC_DSPSC_REGNUM, + SIM_ARM_IWMMXT_COP0R0_REGNUM, + SIM_ARM_IWMMXT_COP0R1_REGNUM, + SIM_ARM_IWMMXT_COP0R2_REGNUM, + SIM_ARM_IWMMXT_COP0R3_REGNUM, + SIM_ARM_IWMMXT_COP0R4_REGNUM, + SIM_ARM_IWMMXT_COP0R5_REGNUM, + SIM_ARM_IWMMXT_COP0R6_REGNUM, + SIM_ARM_IWMMXT_COP0R7_REGNUM, + SIM_ARM_IWMMXT_COP0R8_REGNUM, + SIM_ARM_IWMMXT_COP0R9_REGNUM, + SIM_ARM_IWMMXT_COP0R10_REGNUM, + SIM_ARM_IWMMXT_COP0R11_REGNUM, + SIM_ARM_IWMMXT_COP0R12_REGNUM, + SIM_ARM_IWMMXT_COP0R13_REGNUM, + SIM_ARM_IWMMXT_COP0R14_REGNUM, + SIM_ARM_IWMMXT_COP0R15_REGNUM, + SIM_ARM_IWMMXT_COP1R0_REGNUM, + SIM_ARM_IWMMXT_COP1R1_REGNUM, + SIM_ARM_IWMMXT_COP1R2_REGNUM, + SIM_ARM_IWMMXT_COP1R3_REGNUM, + SIM_ARM_IWMMXT_COP1R4_REGNUM, + SIM_ARM_IWMMXT_COP1R5_REGNUM, + SIM_ARM_IWMMXT_COP1R6_REGNUM, + SIM_ARM_IWMMXT_COP1R7_REGNUM, + SIM_ARM_IWMMXT_COP1R8_REGNUM, + SIM_ARM_IWMMXT_COP1R9_REGNUM, + SIM_ARM_IWMMXT_COP1R10_REGNUM, + SIM_ARM_IWMMXT_COP1R11_REGNUM, + SIM_ARM_IWMMXT_COP1R12_REGNUM, + SIM_ARM_IWMMXT_COP1R13_REGNUM, + SIM_ARM_IWMMXT_COP1R14_REGNUM, + SIM_ARM_IWMMXT_COP1R15_REGNUM }; #ifdef __cplusplus |