; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mattr=+avx -slp-threshold=-1000 < %s | FileCheck %s define i64 @Foo(ptr align 8 dereferenceable(344) %0, i64 %1) { ; CHECK-LABEL: define i64 @Foo( ; CHECK-SAME: ptr align 8 dereferenceable(344) [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i64 104 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i64 112 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i64 24 ; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP3]], align 8 ; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP4]], align 8 ; CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP5]], align 8 ; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP0]], align 8 ; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i64> poison, i64 [[TMP6]], i32 0 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i64> [[TMP10]], i64 [[TMP9]], i32 1 ; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i64> poison, i64 [[TMP7]], i32 0 ; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x i64> [[TMP12]], i64 [[TMP8]], i32 1 ; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i64> poison, i64 0, i32 0 ; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i64> , i64 [[TMP1]], i32 1 ; CHECK-NEXT: br label %[[BB16:.*]] ; CHECK: [[BB16]]: ; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i64> [ [[TMP11]], [[TMP2:%.*]] ], [ zeroinitializer, %[[TMP25:.*]] ] ; CHECK-NEXT: [[TMP18:%.*]] = phi <2 x i64> [ [[TMP13]], [[TMP2]] ], [ [[TMP29:%.*]], %[[TMP25]] ] ; CHECK-NEXT: switch i32 0, label %[[BB19:.*]] [ ; CHECK-NEXT: i32 0, label %[[TMP25]] ; CHECK-NEXT: ] ; CHECK: [[BB19]]: ; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x i64> [[TMP18]], <2 x i64> poison, <4 x i32> ; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x i64> [[TMP20]], i64 0, i32 1 ; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i64> [[TMP21]], i64 0, i32 2 ; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <4 x i64> [[TMP22]], <4 x i64> poison, <4 x i32> ; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x i64> [[TMP14]], <2 x i64> [[TMP18]], <2 x i32> ; CHECK-NEXT: br label %[[TMP25]] ; CHECK: [[TMP25]]: ; CHECK-NEXT: [[TMP26:%.*]] = phi <2 x i64> [ [[TMP17]], %[[BB19]] ], [ zeroinitializer, %[[BB16]] ] ; CHECK-NEXT: [[TMP27:%.*]] = phi <4 x i64> [ [[TMP23]], %[[BB19]] ], [ zeroinitializer, %[[BB16]] ] ; CHECK-NEXT: [[TMP28:%.*]] = phi <2 x i64> [ [[TMP24]], %[[BB19]] ], [ [[TMP15]], %[[BB16]] ] ; CHECK-NEXT: [[TMP29]] = shufflevector <2 x i64> [[TMP18]], <2 x i64> , <2 x i32> ; CHECK-NEXT: br i1 false, label %[[DOTLOOPEXIT206:.*]], label %[[BB16]] ; CHECK: [[_LOOPEXIT206:.*:]] ; CHECK-NEXT: switch i32 0, label %[[BB32:.*]] [ ; CHECK-NEXT: i32 0, [[DOTCONT174:label %.*]] ; CHECK-NEXT: i32 1, label %[[BB30:.*]] ; CHECK-NEXT: ] ; CHECK: [[BB30]]: ; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <4 x i64> [[TMP27]], <4 x i64> , <4 x i32> ; CHECK-NEXT: br [[DOTCONT174]] ; CHECK: [[BB32]]: ; CHECK-NEXT: [[TMP33:%.*]] = insertelement <4 x i64> [[TMP27]], i64 0, i32 1 ; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i64> [[TMP33]], i64 0, i32 2 ; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <4 x i64> [[TMP34]], <4 x i64> poison, <4 x i32> ; CHECK-NEXT: [[TMP36:%.*]] = insertelement <2 x i64> [[TMP28]], i64 0, i32 0 ; CHECK-NEXT: br [[DOTCONT174]] ; CHECK: [[_CONT174:.*:]] ; CHECK-NEXT: [[TMP37:%.*]] = phi <2 x i64> [ [[TMP26]], %[[BB32]] ], [ zeroinitializer, %[[BB30]] ], [ [[TMP26]], %[[DOTLOOPEXIT206]] ] ; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i64> [ [[TMP35]], %[[BB32]] ], [ [[TMP31]], %[[BB30]] ], [ [[TMP27]], %[[DOTLOOPEXIT206]] ] ; CHECK-NEXT: [[TMP39:%.*]] = phi <2 x i64> [ [[TMP36]], %[[BB32]] ], [ zeroinitializer, %[[BB30]] ], [ [[TMP28]], %[[DOTLOOPEXIT206]] ] ; CHECK-NEXT: ret i64 0 ; %3 = getelementptr i8, ptr %0, i64 104 %4 = getelementptr i8, ptr %0, i64 112 %5 = getelementptr i8, ptr %0, i64 24 %6 = load i64, ptr %3, align 8 %7 = load i64, ptr %4, align 8 %8 = load i64, ptr %5, align 8 %9 = load i64, ptr %0, align 8 br label %10 10: %11 = phi i64 [ %9, %2 ], [ 0, %18 ] %12 = phi i64 [ %8, %2 ], [ %12, %18 ] %13 = phi i64 [ %7, %2 ], [ 0, %18 ] %14 = phi i64 [ %6, %2 ], [ 0, %18 ] switch i32 0, label %15 [ i32 0, label %18 ] 15: %16 = tail call i64 @llvm.umin.i64(i64 0, i64 0) %17 = tail call i64 @llvm.umax.i64(i64 0, i64 0) br label %18 18: %19 = phi i64 [ %17, %15 ], [ 0, %10 ] %20 = phi i64 [ %16, %15 ], [ 0, %10 ] %21 = phi i64 [ %11, %15 ], [ 0, %10 ] %22 = phi i64 [ %12, %15 ], [ 0, %10 ] %23 = phi i64 [ %13, %15 ], [ %1, %10 ] %24 = phi i64 [ %14, %15 ], [ 0, %10 ] br i1 false, label %.loopexit206, label %10 .loopexit206: switch i32 0, label %26 [ i32 0, label %.cont174 i32 1, label %25 ] 25: br label %.cont174 26: %27 = tail call i64 @llvm.umin.i64(i64 0, i64 0) %28 = tail call i64 @llvm.umax.i64(i64 0, i64 0) br label %.cont174 .cont174: %.sroa.139.1 = phi i64 [ %28, %26 ], [ %19, %25 ], [ %19, %.loopexit206 ] %.sroa.133.1 = phi i64 [ %27, %26 ], [ 0, %25 ], [ %20, %.loopexit206 ] %.sroa.81.1 = phi i64 [ %23, %26 ], [ 0, %25 ], [ %23, %.loopexit206 ] %.sroa.75.1 = phi i64 [ %24, %26 ], [ 0, %25 ], [ %24, %.loopexit206 ] %.sroa.21.1 = phi i64 [ %21, %26 ], [ 0, %25 ], [ %21, %.loopexit206 ] %.sroa.15.1 = phi i64 [ %22, %26 ], [ 0, %25 ], [ %22, %.loopexit206 ] %29 = phi i64 [ %28, %26 ], [ 0, %25 ], [ %19, %.loopexit206 ] %30 = phi i64 [ %27, %26 ], [ 0, %25 ], [ %20, %.loopexit206 ] ret i64 0 } declare i64 @llvm.umax.i64(i64, i64) declare i64 @llvm.umin.i64(i64, i64)