; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 ; RUN: opt < %s -S -p loop-vectorize -mtriple riscv32 -mattr=+v | FileCheck %s ; The EVL here is used by two VPWidenPointerInductionRecipes which are then ; expanded to two muls. The muls are then CSE'd, so make sure the verifier ; doesn't complain if a user of EVL has multiple uses. define i32 @widenpointerinduction_evl_cse(ptr noalias %p0, ptr noalias %p1) { ; CHECK-LABEL: define i32 @widenpointerinduction_evl_cse( ; CHECK-SAME: ptr noalias [[P0:%.*]], ptr noalias [[P1:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement poison, ptr [[P0]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector [[BROADCAST_SPLATINSERT]], poison, zeroinitializer ; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement poison, ptr [[P1]], i64 0 ; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector [[BROADCAST_SPLATINSERT1]], poison, zeroinitializer ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[P0]], %[[VECTOR_PH]] ], [ [[PTR_IND:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: [[POINTER_PHI3:%.*]] = phi ptr [ [[P1]], %[[VECTOR_PH]] ], [ [[PTR_IND5:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: [[AVL:%.*]] = phi i32 [ 1024, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: [[TMP0:%.*]] = call @llvm.stepvector.nxv4i32() ; CHECK-NEXT: [[TMP1:%.*]] = shl [[TMP0]], splat (i32 1) ; CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI3]], [[TMP1]] ; CHECK-NEXT: [[VECTOR_GEP4:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], [[TMP1]] ; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.experimental.get.vector.length.i32(i32 [[AVL]], i32 4, i1 true) ; CHECK-NEXT: call void @llvm.vp.scatter.nxv4p0.nxv4p0( [[VECTOR_GEP4]], align 4 [[BROADCAST_SPLAT]], splat (i1 true), i32 [[TMP2]]) ; CHECK-NEXT: call void @llvm.vp.scatter.nxv4p0.nxv4p0( [[VECTOR_GEP]], align 4 [[BROADCAST_SPLAT2]], splat (i1 true), i32 [[TMP2]]) ; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i32 [[AVL]], [[TMP2]] ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP2]], 1 ; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i32 [[TMP3]] ; CHECK-NEXT: [[PTR_IND5]] = getelementptr i8, ptr [[POINTER_PHI3]], i32 [[TMP3]] ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[AVL_NEXT]], 0 ; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret i32 0 ; entry: br label %loop loop: %iv = phi i32 [ 0, %entry], [ %iv.next, %loop ] %x = phi ptr [ %p0, %entry ], [ %x.next, %loop ] %y = phi ptr [ %p1, %entry ], [ %y.next, %loop ] store ptr %x, ptr %p0 store ptr %y, ptr %p1 %iv.next = add i32 %iv, 1 %x.next = getelementptr i8, ptr %x, i32 2 %y.next = getelementptr i8, ptr %y, i32 2 %ec = icmp eq i32 %iv.next, 1024 br i1 %ec, label %exit, label %loop exit: ret i32 0 } ;. ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} ;.