; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt -p indvars -S %s | FileCheck %s target triple = "arm64-apple-macosx15.0.0" declare i1 @cond() define void @pred_mip_12(ptr %dst, ptr %src, i32 %n, i64 %offset) { ; CHECK-LABEL: define void @pred_mip_12( ; CHECK-SAME: ptr [[DST:%.*]], ptr [[SRC:%.*]], i32 [[N:%.*]], i64 [[OFFSET:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*]]: ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[N]], i32 1) ; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[SMAX]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[OFFSET]], [[TMP0]] ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP1]] ; CHECK-NEXT: br label %[[OUTER_LOOP:.*]] ; CHECK: [[OUTER_LOOP_LOOPEXIT:.*]]: ; CHECK-NEXT: br label %[[OUTER_LOOP]] ; CHECK: [[OUTER_LOOP]]: ; CHECK-NEXT: [[OUTER_PTR:%.*]] = phi ptr [ [[SRC]], %[[ENTRY]] ], [ [[SCEVGEP]], %[[OUTER_LOOP_LOOPEXIT]] ] ; CHECK-NEXT: [[C:%.*]] = call i1 @cond() ; CHECK-NEXT: br i1 [[C]], label %[[INNER_LOOP_PREHEADER:.*]], label %[[EXIT:.*]] ; CHECK: [[INNER_LOOP_PREHEADER]]: ; CHECK-NEXT: br label %[[INNER_LOOP:.*]] ; CHECK: [[INNER_LOOP]]: ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], %[[INNER_LOOP]] ], [ 0, %[[INNER_LOOP_PREHEADER]] ] ; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[OUTER_PTR]], align 1 ; CHECK-NEXT: store i8 [[L]], ptr [[DST]], align 2 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], [[SMAX]] ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[INNER_LOOP]], label %[[OUTER_LOOP_LOOPEXIT]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %outer.loop outer.loop: %outer.ptr = phi ptr [ %src, %entry ], [ %ptr.iv.next, %inner.loop ] %c = call i1 @cond() br i1 %c, label %inner.loop, label %exit inner.loop: %iv = phi i32 [ 0, %outer.loop ], [ %iv.next, %inner.loop ] %ptr.iv = phi ptr [ %src, %outer.loop ], [ %ptr.iv.next, %inner.loop ] %l = load i8, ptr %outer.ptr, align 1 %ptr.iv.next = getelementptr i8, ptr %ptr.iv, i64 %offset store i8 %l, ptr %dst, align 2 %iv.next = add i32 %iv, 1 %ec = icmp slt i32 %iv.next, %n br i1 %ec, label %inner.loop, label %outer.loop exit: ret void }