; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 ; RUN: llc -mtriple=aarch64 -global-isel -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,O0 ; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,O2 define void @test_asm() { ; O0-LABEL: test_asm: ; O0: // %bb.0: ; O0-NEXT: mov w8, #42 // =0x2a ; O0-NEXT: // kill: def $x8 killed $w8 ; O0-NEXT: //APP ; O0-NEXT: mov x0, x8 ; O0-NEXT: //NO_APP ; O0-NEXT: ret ; ; O2-LABEL: test_asm: ; O2: // %bb.0: ; O2-NEXT: mov w8, #42 // =0x2a ; O2-NEXT: //APP ; O2-NEXT: mov x0, x8 ; O2-NEXT: //NO_APP ; O2-NEXT: ret call void asm sideeffect "mov x0, $0", "r"(i64 42) ret void } ; regression test for https://github.com/llvm/llvm-project/issues/79822 define i16 @test_16bit_reg(i16 %x) { ; O0-LABEL: test_16bit_reg: ; O0: // %bb.0: ; O0-NEXT: fmov s0, w0 ; O0-NEXT: // kill: def $h0 killed $h0 killed $s0 ; O0-NEXT: //APP ; O0-NEXT: nop ; O0-NEXT: //NO_APP ; O0-NEXT: // kill: def $s0 killed $h0 ; O0-NEXT: fmov w0, s0 ; O0-NEXT: ret ; ; O2-LABEL: test_16bit_reg: ; O2: // %bb.0: ; O2-NEXT: fmov s0, w0 ; O2-NEXT: // kill: def $h0 killed $h0 killed $s0 ; O2-NEXT: //APP ; O2-NEXT: nop ; O2-NEXT: //NO_APP ; O2-NEXT: // kill: def $h0 killed $h0 def $s0 ; O2-NEXT: fmov w0, s0 ; O2-NEXT: ret %ret = call i16 asm "nop", "=&{h0},0"(i16 %x) ret i16 %ret } define i32 @test_32bit_reg(i32 %x) { ; CHECK-LABEL: test_32bit_reg: ; CHECK: // %bb.0: ; CHECK-NEXT: fmov s0, w0 ; CHECK-NEXT: //APP ; CHECK-NEXT: nop ; CHECK-NEXT: //NO_APP ; CHECK-NEXT: fmov w0, s0 ; CHECK-NEXT: ret %ret = call i32 asm "nop", "=&{s0},0"(i32 %x) ret i32 %ret } define i64 @test_64bit_reg(i64 %x) { ; CHECK-LABEL: test_64bit_reg: ; CHECK: // %bb.0: ; CHECK-NEXT: fmov d0, x0 ; CHECK-NEXT: //APP ; CHECK-NEXT: nop ; CHECK-NEXT: //NO_APP ; CHECK-NEXT: fmov x0, d0 ; CHECK-NEXT: ret %ret = call i64 asm "nop", "=&{d0},0"(i64 %x) ret i64 %ret }