// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.7-library -disable-llvm-passes -emit-llvm -finclude-default-header -o - %s | FileCheck %s // CHECK-LABEL: define hidden noundef <12 x i32> @_Z10trunc_castu11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I34:%.*]] = alloca [12 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> // CHECK-NEXT: store <12 x i32> [[TRUNC]], ptr [[I34]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <12 x i32>, ptr [[I34]], align 4 // CHECK-NEXT: ret <12 x i32> [[TMP1]] // int3x4 trunc_cast(int4x4 i44) { int3x4 i34 = (int3x4)i44; return i34; } // CHECK-LABEL: define hidden noundef <12 x i32> @_Z11trunc_cast0u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I43:%.*]] = alloca [12 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> // CHECK-NEXT: store <12 x i32> [[TRUNC]], ptr [[I43]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <12 x i32>, ptr [[I43]], align 4 // CHECK-NEXT: ret <12 x i32> [[TMP1]] // int4x3 trunc_cast0(int4x4 i44) { int4x3 i43 = (int4x3)i44; return i43; } // CHECK-LABEL: define hidden noundef <9 x i32> @_Z11trunc_cast1u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I33:%.*]] = alloca [9 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <9 x i32> // CHECK-NEXT: store <9 x i32> [[TRUNC]], ptr [[I33]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <9 x i32>, ptr [[I33]], align 4 // CHECK-NEXT: ret <9 x i32> [[TMP1]] // int3x3 trunc_cast1(int4x4 i44) { int3x3 i33 = (int3x3)i44; return i33; } // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast2u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I32:%.*]] = alloca [6 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> // CHECK-NEXT: store <6 x i32> [[TRUNC]], ptr [[I32]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <6 x i32>, ptr [[I32]], align 4 // CHECK-NEXT: ret <6 x i32> [[TMP1]] // int3x2 trunc_cast2(int4x4 i44) { int3x2 i32 = (int3x2)i44; return i32; } // CHECK-LABEL: define hidden noundef <6 x i32> @_Z11trunc_cast3u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I23:%.*]] = alloca [6 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <6 x i32> // CHECK-NEXT: store <6 x i32> [[TRUNC]], ptr [[I23]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <6 x i32>, ptr [[I23]], align 4 // CHECK-NEXT: ret <6 x i32> [[TMP1]] // int2x3 trunc_cast3(int4x4 i44) { int2x3 i23 = (int2x3)i44; return i23; } // CHECK-LABEL: define hidden noundef <4 x i32> @_Z11trunc_cast4u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I22:%.*]] = alloca [4 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <4 x i32> // CHECK-NEXT: store <4 x i32> [[TRUNC]], ptr [[I22]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr [[I22]], align 4 // CHECK-NEXT: ret <4 x i32> [[TMP1]] // int2x2 trunc_cast4(int4x4 i44) { int2x2 i22 = (int2x2)i44; return i22; } // CHECK-LABEL: define hidden noundef <2 x i32> @_Z11trunc_cast5u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I21:%.*]] = alloca [2 x i32], align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <2 x i32> // CHECK-NEXT: store <2 x i32> [[TRUNC]], ptr [[I21]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load <2 x i32>, ptr [[I21]], align 4 // CHECK-NEXT: ret <2 x i32> [[TMP1]] // int2x1 trunc_cast5(int4x4 i44) { int2x1 i21 = (int2x1)i44; return i21; } // CHECK-LABEL: define hidden noundef i32 @_Z11trunc_cast6u11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[CAST_MTRUNC:%.*]] = extractelement <16 x i32> [[TMP0]], i32 0 // CHECK-NEXT: store i32 [[CAST_MTRUNC]], ptr [[I1]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I1]], align 4 // CHECK-NEXT: ret i32 [[TMP1]] // int trunc_cast6(int4x4 i44) { int i1 = (int)i44; return i1; } // CHECK-LABEL: define hidden noundef i32 @_Z16trunc_multi_castu11matrix_typeILm4ELm4EiE( // CHECK-SAME: <16 x i32> noundef [[I44:%.*]]) #[[ATTR0]] { // CHECK-NEXT: [[ENTRY:.*:]] // CHECK-NEXT: [[I44_ADDR:%.*]] = alloca [16 x i32], align 4 // CHECK-NEXT: [[I1:%.*]] = alloca i32, align 4 // CHECK-NEXT: store <16 x i32> [[I44]], ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i32>, ptr [[I44_ADDR]], align 4 // CHECK-NEXT: [[TRUNC:%.*]] = shufflevector <16 x i32> [[TMP0]], <16 x i32> poison, <12 x i32> // CHECK-NEXT: [[CAST_MTRUNC:%.*]] = extractelement <12 x i32> [[TRUNC]], i32 0 // CHECK-NEXT: store i32 [[CAST_MTRUNC]], ptr [[I1]], align 4 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I1]], align 4 // CHECK-NEXT: ret i32 [[TMP1]] // int trunc_multi_cast(int4x4 i44) { int i1 = (int)(int3x4)i44; return i1; }