From fb81b93e175f355d3ee96a85c86ac27d75d8c7a9 Mon Sep 17 00:00:00 2001
From: Elena Demikhovsky <elena.demikhovsky@intel.com>
Date: Thu, 25 Dec 2014 07:49:20 +0000
Subject: Masked Load/Store - Changed the order of parameters in intrinsics. No
 functional changes. The documentation is coming.

llvm-svn: 224829
---
 llvm/utils/TableGen/CodeGenTarget.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'llvm/utils/TableGen/CodeGenTarget.cpp')

diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index 1f13a20..c4d30e9 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -531,7 +531,8 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
       // overloaded, all the types can be specified directly.
       assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
                !TyEl->isSubClassOf("LLVMTruncatedType") &&
-               !TyEl->isSubClassOf("LLVMVectorSameWidth")) ||
+               !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
+               !TyEl->isSubClassOf("LLVMPointerToElt")) ||
               VT == MVT::iAny || VT == MVT::vAny) &&
              "Expected iAny or vAny type");
     } else
-- 
cgit v1.1