From ee4582f9c8c395b1a9d901b522510af622206049 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 13 Sep 2024 07:23:44 -0700 Subject: [RISCV] Use CCValAssign::getCustomReg for fixed vector arguments/returns with RVV. (#108470) We need to insert a insert_subvector or extract_subvector which feels pretty custom. This should make it easier to support fixed vector arguments for GISel. --- llvm/lib/Target/RISCV/RISCVCallingConv.cpp | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/RISCV/RISCVCallingConv.cpp') diff --git a/llvm/lib/Target/RISCV/RISCVCallingConv.cpp b/llvm/lib/Target/RISCV/RISCVCallingConv.cpp index fc276d1..b7ed9de 100644 --- a/llvm/lib/Target/RISCV/RISCVCallingConv.cpp +++ b/llvm/lib/Target/RISCV/RISCVCallingConv.cpp @@ -448,8 +448,12 @@ bool llvm::CC_RISCV(unsigned ValNo, MVT ValVT, MVT LocVT, if (Reg) { // Fixed-length vectors are located in the corresponding scalable-vector // container types. - if (ValVT.isFixedLengthVector()) + if (ValVT.isFixedLengthVector()) { LocVT = TLI.getContainerForFixedLengthVector(LocVT); + State.addLoc( + CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); + return false; + } } else { // For return values, the vector must be passed fully via registers or // via the stack. @@ -583,8 +587,12 @@ bool llvm::CC_RISCV_FastCC(unsigned ValNo, MVT ValVT, MVT LocVT, if (MCRegister Reg = allocateRVVReg(ValVT, ValNo, State, TLI)) { // Fixed-length vectors are located in the corresponding scalable-vector // container types. - if (LocVT.isFixedLengthVector()) + if (LocVT.isFixedLengthVector()) { LocVT = TLI.getContainerForFixedLengthVector(LocVT); + State.addLoc( + CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); + return false; + } State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); return false; } -- cgit v1.1