From bc5e969ca1e1567ae5ad259f7f2d55a96e30b07f Mon Sep 17 00:00:00 2001 From: Ting Wang Date: Sun, 9 Oct 2022 01:23:18 -0400 Subject: [PowerPC] Add vector pair calling convention for AIX MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is AIX part of update after https://reviews.llvm.org/D117225 Fixed the issue that AIX64 with vector pair enabled saw redundant spill/reload of callee saved vector registers. Based on original patch by: Kai Luo Reviewed By: lkail Differential Revision: https://reviews.llvm.org/D133466 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp index a60b993..d39934b 100644 --- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -237,8 +237,14 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { } // Standard calling convention CSRs. if (TM.isPPC64()) { - if (Subtarget.pairedVectorMemops()) + if (Subtarget.pairedVectorMemops()) { + if (Subtarget.isAIXABI()) { + if (!TM.getAIXExtendedAltivecABI()) + return SaveR2 ? CSR_PPC64_R2_SaveList : CSR_PPC64_SaveList; + return SaveR2 ? CSR_AIX64_R2_VSRP_SaveList : CSR_AIX64_VSRP_SaveList; + } return SaveR2 ? CSR_SVR464_R2_VSRP_SaveList : CSR_SVR464_VSRP_SaveList; + } if (Subtarget.hasAltivec() && (!Subtarget.isAIXABI() || TM.getAIXExtendedAltivecABI())) { return SaveR2 ? CSR_PPC64_R2_Altivec_SaveList @@ -248,6 +254,9 @@ PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { } // 32-bit targets. if (Subtarget.isAIXABI()) { + if (Subtarget.pairedVectorMemops()) + return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_VSRP_SaveList + : CSR_AIX32_SaveList; if (Subtarget.hasAltivec()) return TM.getAIXExtendedAltivecABI() ? CSR_AIX32_Altivec_SaveList : CSR_AIX32_SaveList; @@ -286,6 +295,11 @@ PPCRegisterInfo::getCallPreservedMask(const MachineFunction &MF, } if (Subtarget.isAIXABI()) { + if (Subtarget.pairedVectorMemops()) { + if (!TM.getAIXExtendedAltivecABI()) + return TM.isPPC64() ? CSR_PPC64_RegMask : CSR_AIX32_RegMask; + return TM.isPPC64() ? CSR_AIX64_VSRP_RegMask : CSR_AIX32_VSRP_RegMask; + } return TM.isPPC64() ? ((Subtarget.hasAltivec() && TM.getAIXExtendedAltivecABI()) ? CSR_PPC64_Altivec_RegMask -- cgit v1.1