From d28f86723f37b2329428dfbcf847d3261f38dcc8 Mon Sep 17 00:00:00 2001 From: Jinsong Ji Date: Tue, 28 Jul 2020 03:02:20 +0000 Subject: Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support" This reverts commit bf544fa1c3cb80f24d85e84559fb11193846259f. Fixed the typo in PPCInstrInfo.cpp. --- llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp') diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index 74c6fd3..362ddf7 100644 --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -167,12 +167,6 @@ static DecodeStatus DecodeG8RC_NOX0RegisterClass(MCInst &Inst, uint64_t RegNo, #define DecodePointerLikeRegClass0 DecodeGPRCRegisterClass #define DecodePointerLikeRegClass1 DecodeGPRC_NOR0RegisterClass -static DecodeStatus DecodeQFRCRegisterClass(MCInst &Inst, uint64_t RegNo, - uint64_t Address, - const void *Decoder) { - return decodeRegisterClass(Inst, RegNo, QFRegs); -} - static DecodeStatus DecodeSPERCRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) { @@ -401,14 +395,9 @@ DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size, // Read the instruction in the proper endianness. uint64_t Inst = ReadFunc(Bytes.data()); - if (STI.getFeatureBits()[PPC::FeatureQPX]) { - DecodeStatus result = - decodeInstruction(DecoderTableQPX32, MI, Inst, Address, this, STI); - if (result != MCDisassembler::Fail) - return result; - } else if (STI.getFeatureBits()[PPC::FeatureSPE]) { + if (STI.getFeatureBits()[PPC::FeatureSPE]) { DecodeStatus result = - decodeInstruction(DecoderTableSPE32, MI, Inst, Address, this, STI); + decodeInstruction(DecoderTableSPE32, MI, Inst, Address, this, STI); if (result != MCDisassembler::Fail) return result; } -- cgit v1.1