From 2bea69bf6503ffc9f3cde9a52b5dac1a25e94e1c Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 1 Aug 2019 23:27:28 +0000 Subject: Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC llvm-svn: 367633 --- llvm/lib/CodeGen/OptimizePHIs.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'llvm/lib/CodeGen/OptimizePHIs.cpp') diff --git a/llvm/lib/CodeGen/OptimizePHIs.cpp b/llvm/lib/CodeGen/OptimizePHIs.cpp index c70b622..3a8c711 100644 --- a/llvm/lib/CodeGen/OptimizePHIs.cpp +++ b/llvm/lib/CodeGen/OptimizePHIs.cpp @@ -115,10 +115,9 @@ bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI, MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); // Skip over register-to-register moves. - if (SrcMI && SrcMI->isCopy() && - !SrcMI->getOperand(0).getSubReg() && + if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && !SrcMI->getOperand(1).getSubReg() && - TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) { + Register::isVirtualRegister(SrcMI->getOperand(1).getReg())) { SrcReg = SrcMI->getOperand(1).getReg(); SrcMI = MRI->getVRegDef(SrcReg); } @@ -143,7 +142,7 @@ bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI, bool OptimizePHIs::IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle) { assert(MI->isPHI() && "IsDeadPHICycle expects a PHI instruction"); unsigned DstReg = MI->getOperand(0).getReg(); - assert(TargetRegisterInfo::isVirtualRegister(DstReg) && + assert(Register::isVirtualRegister(DstReg) && "PHI destination is not a virtual register"); // See if we already saw this register. -- cgit v1.1