From 5cd8d53cac00feafd739dba6215e1f6eed502e46 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Mon, 22 Jan 2024 17:36:32 +0800 Subject: [RISCV] Teach RISCVMergeBaseOffset to handle inline asm (#78945) For inline asm with memory operands, we can merge the offset into the second operand of memory constraint operands. Differential Revision: https://reviews.llvm.org/D158062 --- llvm/lib/CodeGen/MachineOperand.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'llvm/lib/CodeGen/MachineOperand.cpp') diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 12d6b79..c7c0a1c 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -206,6 +206,19 @@ void MachineOperand::ChangeToGA(const GlobalValue *GV, int64_t Offset, setTargetFlags(TargetFlags); } +void MachineOperand::ChangeToBA(const BlockAddress *BA, int64_t Offset, + unsigned TargetFlags) { + assert((!isReg() || !isTied()) && + "Cannot change a tied operand into a block address"); + + removeRegFromUses(); + + OpKind = MO_BlockAddress; + Contents.OffsetedInfo.Val.BA = BA; + setOffset(Offset); + setTargetFlags(TargetFlags); +} + void MachineOperand::ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags) { assert((!isReg() || !isTied()) && "Cannot change a tied operand into an MCSymbol"); -- cgit v1.1