From 070fab8a1f087ddef99c302f9cded2365afb976c Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 16 Jul 2009 20:58:34 +0000 Subject: Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. The inline asm operands must be parsed from the first flag, you cannot assume that an immediate operand preceeding a register use operand is the flag. PowerPC "m" operands are represented as (flag, imm, reg) triples. isRegTiedToDefOperand() would incorrectly interpret the imm as the flag. llvm-svn: 76101 --- llvm/lib/CodeGen/MachineInstr.cpp | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'llvm/lib/CodeGen/MachineInstr.cpp') diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 98cc767..c6f3e31 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -783,16 +783,20 @@ isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx) const { const MachineOperand &MO = getOperand(UseOpIdx); if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0) return false; - int FlagIdx = UseOpIdx - 1; - if (FlagIdx < 1) - return false; - while (!getOperand(FlagIdx).isImm()) { - if (--FlagIdx == 0) - return false; + + // Find the flag operand corresponding to UseOpIdx + unsigned FlagIdx, NumOps=0; + for (FlagIdx = 1; FlagIdx < UseOpIdx; FlagIdx += NumOps+1) { + const MachineOperand &UFMO = getOperand(FlagIdx); + assert(UFMO.isImm() && "Expecting flag operand on inline asm"); + NumOps = InlineAsm::getNumOperandRegisters(UFMO.getImm()); + assert(NumOps < getNumOperands() && "Invalid inline asm flag"); + if (UseOpIdx < FlagIdx+NumOps+1) + break; } - const MachineOperand &UFMO = getOperand(FlagIdx); - if (FlagIdx + InlineAsm::getNumOperandRegisters(UFMO.getImm()) < UseOpIdx) + if (FlagIdx >= UseOpIdx) return false; + const MachineOperand &UFMO = getOperand(FlagIdx); unsigned DefNo; if (InlineAsm::isUseOperandTiedToDef(UFMO.getImm(), DefNo)) { if (!DefOpIdx) -- cgit v1.1